This change makes us get rid of DIx_SYNC_DISP_ERR. The error sometimes
causes the backgound framebuffer reinitialized automatically, even if
we preview captured video on overlay framebuffer.
Signed-off-by: Liu Ying <b17645@freescale.com>
After TV/LCD switch, PXP uses wrong old FB info to set RGBBUF/RGBSIZE.
This patch fixes this problem by notifying PXP to adjust when FB changed.
Signed-off-by: Robby Cai <R63905@freescale.com>
The TZIC base address for MX51 non TO1 is defined as 0xE0003000,
but the according the MX51 TO2 Ref Manual, it should be 0xE0000000.
The reason the system still works with this error is because the TZIC
registers are mirrored at offset 0x3000.
Signed-off-by: Dinh L. Nguyen <Dinh.Nguyen@freescale.com>
blank/unblank fb during v4l2 playback, unblank will cause current buffer
of display channel to be 1. This patch make the sequence of select
display buffer correct.
Signed-off-by: Jason Chen <b02280@freescale.com>
Change the function strcasecmp(buf, "osc") to strncasecmp(buf, "osc",
3), which only compare the first 3bytes.
Signed-off-by: William Lai <b04597@freescale.com>
To use manually buffer select instead of channel link, which resolve fb
blank during v4l2 running issue.
Signed-off-by: Jason Chen <b02280@freescale.com>
UBO and VBO are 22-bit in CPMEM. When processing a high resolution
frame in YUV format, the value of UV-offset may overflow, but the
driver keeps silent.
Signed-off-by: Liu Ying <b17645@freescale.com>
FEC driver of 2.6.31 kernel remove pin iomux config and PHY reset,
which is in fec_gpio_active() needed for i.MX25 and i.MX35.
Signed-off-by: Li Jun <r65092@freescale.com>
Use DP to do CSC for preview on DPFG instead of using IC channel
so that we can get better performance. This change can make us
get rid of IC channel bandwidth limitation when using IC channel
to do upsizing from low resolution to high resolution and CSC.
This change doesn't touch V4L2 overlay for DPBG, because using DP
to do CSC will change the pixel format for DPBG(usually for GUI).
This change doesn't touch V4L2 capture, because users rarely do
upsizing with high multiple in this case.
Signed-off-by: Liu Ying <b17645@freescale.com>
u-boot set wrong standby contorl for regulators,
while kernel doesn't set standby controls which
cuase system can't wakeup from suspend mode.
Signed-off-by: Wallace Wang <r59996@freescale.com>
The UV offset is set wrongly when idmac does cropping.
This patch changes to get the UV offset from user in this case now.
Signed-off-by: Liu Ying <b17645@freescale.com>
Uniform handling NFC INT bit clearance, the INT bit
will be unformed cleared in the wait_op_done function
after any NFC operation.
Signed-off-by:Jason Liu <r64343@freescale.com>
fix the bug that causes the driver to enable the lcd controller twice,
which will request lcd pins twice.
Signed-off-by: Robby Cai <R63905@freescale.com>
Some kernel resource can be accessed in interrupt handler and user
controlled V4L2 ioctrls, so there is a race condition which makes
the kernel malfunction potentially.
Signed-off-by: Liu Ying <b17645@freescale.com>
Update NFC INT wait timeout value to 1s.
1s should be enough for all platforms.
If INT bit not set for 1s timeout value, this
should be high potential of IC issues.
Signed-off-by:Jason Liu <r64343@freescale.com>
Miss clear BYPASS_CPU bit for CLKSEQ. CPU and HClk frequency will low than
24Mhz, so there are not enough bandwidth to support LCD refresh
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Do not disable the eSDHC clk on MX35 3DS board,
since SYSTEM can't boot up after the reset key
is pressed when the SD/MMC boot mode is used.
The root cause is that the ROM code don't ensure
the SD/MMC clk is running when boot system.
Signed-off-by: Richard Zhu <r65037@freescale.com>
if unblank to blank tve fb too quickly, system will hang. It's caused by
unprotected tve register access.
Signed-off-by: Jason Chen <b02280@freescale.com>
1.arrange display port according to choice of different display device
2.for ipu_disp.c: not round pixel clock to even for tvout.
3.cmdline "hdtv" enable 720P, "hdtv=2" enable 720P as primary.
Signed-off-by: Jason Chen <b02280@freescale.com>
add dmfc size control for dynamic change and _setup.
DMFC_NORMAL: segment 0,1 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DC: segment 0~3 for DC, 4,5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_DP: segment 0,1 for DC, 2~5 for DP-BG, 6,7 for DP-FG.
DMFC_HIGH_RESOLUTION_ONLY_DP: segment 0~3 for DP-BG, 4~7 for DP-FG.
IPU diplay driver will try to enlarge its related DMFC segment size
when it meet high resolution condition, but if dmfc is already in high
resolution setting, dmfc will not change.That said, first request wins.
For cmdline setting, "dmfc=1" is DMFC_HIGH_RESOLUTION_DC, "dmfc=2"
is DMFC_HIGH_RESOLUTION_DP, "dmfc=3" is
DMFC_HIGH_RESOLUTION_ONLY_DP.
NOTE: DMFC_HIGH_RESOLUTION_ONLY_DP only can be set by cmdline.
Signed-off-by: Jason Chen <b02280@freescale.com>
Setting "video=mxcfb:800x600-16@60" in the exec command makes video not play
correctly, IPU didn't play video when panel blank line where lower then minimum
required by IPU
Signed-off-by: Ran Ferderber r53561@freescale.com
1.GPMI NAND flash scan scheme can overcome the shortcomings
of MTD NAND community code.
2.Put it to the common NAND directory can benifit I.MX NAND
driver besides GPMI NAND driver.
3.Fix the section mismatch build warnings on ALL platforms.
4.Fix the kbuild build errors of I.MX platforms.
Signed-off-by:Jason Liu <r64343@freescale.com>
Disable lcdif controller when suspend or screen blanked.
By doing so, can set CPU freq to 64000Khz (ENGR00119096)
Signed-off-by: Robby Cai <R63905@freescale.com>
USB initialization set power status register to wrong status.
Cause power state change dead loop.
Remove EA code using debug register to control HW_POWER_STS bit.
That is not perfered.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Change -march=armv7-a to -march=armv7a
Revert "ENGR00116759 iMX51: Fix compile error when using gcc4.3.3"
This reverts commit 39b2ec2cfc591472db51c75944d8462255e9cf4d.
Signed-off-by: Alan Tull <r80115@freescale.com>
