Commit Graph

37573 Commits

Author SHA1 Message Date
Liu Ying
12c8a0fa58 ENGR00117835-6 MX31:Change defconfig for 2.6.31 kernel
Change default configuration file for 2.6.31 kernel including
enable V4l2 feature.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:45:14 -05:00
Liu Ying
5eb05d4d24 ENGR00117835-5 MX35:Change defconfig for 2.6.31 kernel
Change default configuration file for 2.6.31 kernel including
enable V4l2 feature.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:45:13 -05:00
Liu Ying
cef6967ecc ENGR00117835-4 MX37:Change defconfig for 2.6.31 kernel
Change default configuration file for 2.6.31 kernel including
enable V4l2 feature.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:45:13 -05:00
Liu Ying
7c55991d53 ENGR00117835-3 MX51:Change defconfig for 2.6.31 kernel
Change default configuration file for 2.6.31 kernel including
enable V4l2 feature.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:45:12 -05:00
Lily Zhang
fc279b5771 ENGR00117920 MX51 3DS: Add SMSC911X platform data
Add SMSC911X platform data for MX51 3DS to make it work.

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:45:10 -05:00
Richard Zhu
39cdfdd0a5 ENGR00117630 [MX51 BBG] Can not boot up system from MMC plus card
This issue is caused by the improper PAD configuration.
Modify the PAD configurations and this issue disappeared.

Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-08-10 11:45:08 -05:00
Patrick Turley
1cafce73e5 ENGR00115074: [MX233_BSP] Comment, clarify and characterize the NAND Flash
New comments and some variable renaming to improve the understandability of
the code.

Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
2010-08-10 11:45:08 -05:00
Wu Guoxing
913cb128bd ENGR00117760 GPU: use axi_a clock for GPU 2D and 3D
GPU: use axi_a clock for GPU 2D and 3D

Signed-off-by: Wu Guoxing <b02248@freescale.com>
2010-08-10 11:45:07 -05:00
Robert Lee
1646bc39e4 ENGR00117791 stmp37xx specific battery charger code causing problems
The battery charger driver contains 37xx specific battery charger
driver code that is incompatible with 378x/iMX23 and needs removal

Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-08-10 11:45:07 -05:00
Zhou Jingyu
d1ebb9b6fc ENGR00117417 imx233: remove 24000 HZ cpu profile for ddr
remove 24000 HZ cpu profile for ddr

Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2010-08-10 11:45:05 -05:00
Rob Herring
ccfcfc7a9c ENGR00117540 z160: add memory region for scratch buffers
The z160 needs 88KB memory for temp buffers.

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:45:05 -05:00
Robby Cai
425c23d1f5 ENGR00117324 Turn on MTD_NAND_GPMI and MTD_CONCAT options
It's convenient to use NAND if they are turned on by default.

Signed-off-by: Robby Cai <r63905@freescale.com>
2010-08-10 11:45:03 -05:00
Robert Lee
dea20ce49d ENGR00117297 cpufreq clock/voltage table needs to be updated
Previous values being used were for STMP378x which has lower temperature
requirements.  The updated values work with 105C temperatures but require
higher digital core voltages and lower maximum EMI clock speeds.:$lower
maximum EMI clock speeds.:

Signed-off-by: Robert Lee <robert.lee@freescale.com>
2010-08-10 11:45:03 -05:00
Ranjani Vaidyanathan-RA5478
9b5e5b73c9 ENGR00117202: System cannot resume when suspended at lower CPU frequency.
Change the code such that suspend and resume always set the CPU frequency
and voltage to the highest level.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:45:02 -05:00
Frank Li
1992994612 ENGR00117307 iMX23 reduce LCD driver strength to 8mA
Changing the LCD pin drive strengths to 8mA reduces
the amount of overshoot in half (15% and 50%) and
does not significantly change the rise and fall time
characteristics of the digital LCD signals

Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-08-10 11:45:01 -05:00
Frank Li
43a06f54b9 ENGR00117252 Fix iMX23 dotclk is double as expected value
Dotclk is double as expected value. This fix actually is workaround.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-08-10 11:45:01 -05:00
Frank Li
655e612017 ENGR00117558 iMX233 Updater defconfig need updated to define onchip usb phy
Updater defconfig need updated to define onchip usb phy to fix build error

Signed-off-by: Frank Li <Frank.Li@freescale.com>
(cherry picked from commit 6c729447d71efc157443bcc077e0543d71ed17b8)
2010-08-10 11:44:58 -05:00
Miao Yu
f0dd765dcd ENGR00116759 iMX51: Fix compile error when using gcc4.3.3
Enable armv7-a instruction when using gcc4.3.3 (code sourcery,
version 2009q1, glibc2.8)

Signed-off-by: Miao Yu <r65093@freescale.com>
2010-08-10 11:44:57 -05:00
Raj Rajasekaran
d7c01ef724 ENGR00116798:MX51: Add support to handle potential hang on SCC HW failute.
-Added kernel error message to handle hang due to SCC HW failure.
-Eliminated unwanted sleeps.
-Kernel error message to handle the case when SCC key fuses are not blown.

Signed-off-by: Raj Rajasekaran <b10872@freescale.com>
2010-08-10 11:44:56 -05:00
Ranjani Vaidyanathan-RA5478
cf982c8f39 ENGR00117205: Enable M4IF power savings only for MX51 TO3 parts.
Disable M4IF auto clock gating for EMI_FAST on MX51 TO2.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:55 -05:00
Ranjani Vaidyanathan-RA5478
e717ff90e8 ENGR00117111: Added EMPGC0 fixes for MX37.
Set ALP bits to 0.
Set the SRPG powerup and powerdown values.
Set the WM8350 to be in normal mode (PWM) rather in Pulse Skipping mode.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:54 -05:00
Jason Chen
436ed89d96 ENGR00079396 mx37: enable clock event for oprofile
Only clock event be enabled.

Signed-off-by: Jason Chen <b02280@freescale.com>
2010-08-10 11:44:52 -05:00
Rob Herring
df6a3db108 ENGR00116558: MX233: USB pin detect
MX233: Restructure the STMP378xxx USB Host and Gadget device structures
to be similar to MXC structures. Enable fsl_otg_arc driver to work on
MX233 platform. Remove FSL_USB2_DONT_REMAP requirement.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>

Conflicts:

	arch/arm/mach-stmp3xxx/Kconfig
	arch/arm/mach-stmp3xxx/Makefile
	arch/arm/mach-stmp3xxx/devices.c
	arch/arm/mach-stmp3xxx/include/mach/stmp3xxx.h
	arch/arm/mach-stmp3xxx/stmp378x_devb.c
2010-08-10 11:44:52 -05:00
Robby Cai
1d21687b41 ENGR00116416-2 Gate off clocks to LCDIF when it's inactive
Gate off clocks to LCDIF when it's inactive, Gate on otherwise.

Signed-off-by: Robby Cai <r63905@freescale.com>
2010-08-10 11:44:50 -05:00
Robby Cai
707ca593fc ENGR00116416-1 reset PXP module when it's inactive
Putting PXP in reset state gains the lowest power.
Restrore the PXP regs once PXP comes out of reset state.

Signed-off-by: Robby Cai <r63905@freescale.com>
2010-08-10 11:44:49 -05:00
Albert Chen
94af0e7844 ENGR00115875 add USB gadget low power mode feature.
USB will enter low power mode if no vbus power supply.
	Only finished this feature in Mx37.
	1. When enter low power mode, driver will close usb related clocks
		as possible as could.
		set usb IP to stop.
		Set PHY to low power suspend by setting PHCD bit of portsc.
	2. This patch doesn't support low power mode in OTG mode yet.

Signed-off-by: Albert Chen <r65187@freescale.com>
2010-08-10 11:44:49 -05:00
Ranjani Vaidyanathan-RA5478
e7591acd94 ENGR00117112 : MX51: Add support for automatic clock gating of EMI_FAST clock.
Enable automatic power saving of the EMI_FAST path in M4IF (TO3 only).

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:48 -05:00
Ranjani Vaidyanathan-RA5478
72f2abbd53 ENGR00117090: MX51: Added support for TO3 fixes
Changed the LP and GP voltages based on TO3 datasheet.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:47 -05:00
Ranjani Vaidyanathan-RA5478
58543fe1df ENGR00117091: Fixed MX37 build break due to missing global variable.
Added dvfs_core_is_active define to mach/mx37_3stack/devices.c

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:47 -05:00
Ranjani Vaidyanathan-RA5478
9051cad471 ENGR00116947: MX51: Fix the audio-pop/channel swapping issue in lp-apm mode.
In LPAPM mode, peripheral domain is clocked from the 24MHz clock.
There is a brief period of time when IPG clock drops close to 2.4MHz,
which violates the SSI to IPG clock ratio. And this causes incorrect data
to be clocked out of SSI.
Fix the code such that IPG clock does not go below 10MHz when
entering/exiting LPAPM mode.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:46 -05:00
Zhou Jingyu
ab8c603307 ENGR00115040 imx233: reduce stanby power below 2mA@3.7v
reduce stanby power to 2mA@3.7v

Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
2010-08-10 11:44:45 -05:00
Ranjani Vaidyanathan-RA5478
55a8300bb3 ENGR00116479: Ported DVFS-CORE and audio pop issue from Apollo project.
Fix the audio pop issue that is caused whenever the system enters and
exits LP-APM mode.
Added some more working points for DVFS-CORE.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:44:42 -05:00
Rob Herring
be0524d38f ENGR00117389 Port 5.0.0 release to 2.6.31
This is i.MX BSP 5.0.0 release ported to 2.6.31

Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Alan Tull <r80115@freescale.com>
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
2010-08-10 11:44:41 -05:00
Rob Herring
844d4ad617 cache-l2x0: cache enhancements
Add flush all
Add enable/disable
Add Event bus

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:44:24 -05:00
Rob Herring
58c0e2d067 ENGR00107731-1 arm: Add more cache memory types macros
Add memory types for different inner and outer cache settings.

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:44:20 -05:00
Catalin Marinas
868ab6e5f8 Enable partial low interrupt latency mode for ARM1136
Enable partial low interrupt latency mode for ARM1136

This patch is a workaround for the 364296 ARM1136 r0pX errata
(possible cache data corruption with hit-under-miss enabled). It sets
the undocumented bit 31 in the auxiliary control register and the FI bit in
the control register, thus disabling hit-under-miss without putting the
processor into full low interrupt latency mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2010-08-10 11:44:19 -05:00
Jan Beulich
231c18f9ed x86: Fix placement of FIX_OHCI1394_BASE
commit ff30a0543e9a6cd732582063e7cae951cdb7acf2 upstream.

Ever for 32-bit with sufficiently high NR_CPUS, and starting
with commit 789d03f584 also for
64-bit, the statically allocated early fixmap page tables were
not covering FIX_OHCI1394_BASE, leading to a boot time crash
when "ohci1394_dma=early" was used. Despite this entry not being
a permanently used one, it needs to be moved into the permanent
range since it has to be close to FIX_DBGP_BASE and
FIX_EARLYCON_MEM_BASE.

Reported-bisected-and-tested-by: Justin P. Mattock <justinmattock@gmail.com>
Fixes-bug: http://bugzilla.kernel.org/show_bug.cgi?id=14487
Signed-off-by: Jan Beulich <jbeulich@novell.com>
LKML-Reference: <4B9E15D30200007800034D23@vpn.id2.novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:56:00 -07:00
Andreas Schwab
f57c82ec2a powerpc: TIF_ABI_PENDING bit removal
commit 94f28da8409c6059135e89ac64a0839993124155 upstream.

Here are the powerpc bits to remove TIF_ABI_PENDING now that
set_personality() is called at the appropriate place in exec.

Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
2010-04-01 15:55:57 -07:00
H. Peter Anvin
38616b6b68 x86: get rid of the insane TIF_ABI_PENDING bit
commit 05d43ed8a89c159ff641d472f970e3f1baa66318 upstream.

Now that the previous commit made it possible to do the personality
setting at the point of no return, we do just that for ELF binaries.
And suddenly all the reasons for that insane TIF_ABI_PENDING bit go
away, and we can just make SET_PERSONALITY() just do the obvious thing
for a 32-bit compat process.

Everything becomes much more straightforward this way.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
2010-04-01 15:55:56 -07:00
David Miller
f3f66f8afd sparc: TIF_ABI_PENDING bit removal
commit 94673e968cbcce07fa78dac4b0ae05d24b5816e1 upstream.

Here are the sparc bits to remove TIF_ABI_PENDING now that
set_personality() is called at the appropriate place in exec.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
2010-04-01 15:55:56 -07:00
Linus Torvalds
daba0e9518 Split 'flush_old_exec' into two functions
commit 221af7f87b97431e3ee21ce4b0e77d5411cf1549 upstream.

'flush_old_exec()' is the point of no return when doing an execve(), and
it is pretty badly misnamed.  It doesn't just flush the old executable
environment, it also starts up the new one.

Which is very inconvenient for things like setting up the new
personality, because we want the new personality to affect the starting
of the new environment, but at the same time we do _not_ want the new
personality to take effect if flushing the old one fails.

As a result, the x86-64 '32-bit' personality is actually done using this
insane "I'm going to change the ABI, but I haven't done it yet" bit
(TIF_ABI_PENDING), with SET_PERSONALITY() not actually setting the
personality, but just the "pending" bit, so that "flush_thread()" can do
the actual personality magic.

This patch in no way changes any of that insanity, but it does split the
'flush_old_exec()' function up into a preparatory part that can fail
(still called flush_old_exec()), and a new part that will actually set
up the new exec environment (setup_new_exec()).  All callers are changed
to trivially comply with the new world order.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
2010-04-01 15:55:56 -07:00
Jiri Slaby
60c10feaae x86, ia32_aout: do not kill argument mapping
commit 318f6b228ba88a394ef560efc1bfe028ad5ae6b6 upstream.

Do not set current->mm->mmap to NULL in 32-bit emulation on 64-bit
load_aout_binary after flush_old_exec as it would destroy already
set brpm mapping with arguments.

Introduced by b6a2fea393
mm: variable length argument support
where the argument mapping in bprm was added.

[ hpa: this is a regression from 2.6.22... time to kill a.out? ]

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
LKML-Reference: <1265831716-7668-1-git-send-email-jslaby@suse.cz>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ollie Wild <aaw@google.com>
Cc: x86@kernel.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:55 -07:00
Yinghai Lu
d539e55766 x86: Fix SCI on IOAPIC != 0
commit 18dce6ba5c8c6bd0f3ab4efa4cbdd698dab5c40a upstream.

Thomas Renninger <trenn@suse.de> reported on IBM x3330

booting a latest kernel on this machine results in:

PCI: PCI BIOS revision 2.10 entry at 0xfd61c, last bus=1
PCI: Using configuration type 1 for base access bio: create slab <bio-0> at 0
ACPI: SCI (IRQ30) allocation failed
ACPI Exception: AE_NOT_ACQUIRED, Unable to install System Control Interrupt handler (20090903/evevent-161)
ACPI: Unable to start the ACPI Interpreter

Later all kind of devices fail...

and bisect it down to this commit:
commit b9c61b7007

    x86/pci: update pirq_enable_irq() to setup io apic routing

it turns out we need to set irq routing for the sci on ioapic1 early.

-v2: make it work without sparseirq too.
-v3: fix checkpatch.pl warning, and cc to stable

Reported-by: Thomas Renninger <trenn@suse.de>
Bisected-by: Thomas Renninger <trenn@suse.de>
Tested-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <1265793639-15071-2-git-send-email-yinghai@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:55 -07:00
Jan Beulich
236638ad88 mm: replace various uses of num_physpages by totalram_pages
commit 4481374ce88ba8f460c8b89f2572027bd27057d0 upstream.

Sizing of memory allocations shouldn't depend on the number of physical
pages found in a system, as that generally includes (perhaps a huge amount
of) non-RAM pages.  The amount of what actually is usable as storage
should instead be used as a basis here.

Some of the calculations (i.e.  those not intending to use high memory)
should likely even use (totalram_pages - totalhigh_pages).

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Acked-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Ingo Molnar <mingo@elte.hu>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Cc: Hugh Dickins <hugh.dickins@tiscali.co.uk>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Patrick McHardy <kaber@trash.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:50 -07:00
Suresh Siddha
7fdd4f780b x86/PCI/PAT: return EINVAL for pci mmap WC request for !pat_enabled
commit 2992e545ea006992ec9dc91c4fa996ce1e15f921 upstream.

Thomas Schlichter reported:
> X.org uses libpciaccess which tries to mmap with write combining enabled via
> /sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, the
> kernel does fall back to uncached mmap. Then libpciaccess thinks it succeeded
> mapping with write combining enabled and does not set up suited MTRR entries.
> ;-(

Instead of silently mapping pci mmap region as UC minus in the case
of !pat_enabled and wc request, we can return error. Eric Anholt mentioned
that caller (like X) typically follows up with UC minus pci mmap request and
if there is a free mtrr slot, caller will manage adding WC mtrr.

Jesse Barnes says:
> Older versions of libpciaccess will behave better if we do it that way
> (iirc it only allocates an MTRR if the resource_wc file doesn't exist or
> fails to get mapped).

Reported-by: Thomas Schlichter <thomas.schlichter@web.de>
Signed-off-by: Thomas Schlichter <thomas.schlichter@web.de>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:39 -07:00
Suresh Siddha
5cae244ff0 x86, apic: use physical mode for IBM summit platforms
commit dfea91d5a7c795fd6f4e1a97489a98e4e767463e upstream.

Chris McDermott from IBM confirmed that hurricane chipset in IBM summit
platforms doesn't support logical flat mode.  Irrespective of the other
things like apic_id's, total number of logical cpu's, Linux kernel
should default to physical mode for this system.

The 32-bit kernel does so using the OEM checks for the IBM summit
platform.  Add a similar OEM platform check for the 64bit kernel too.

Otherwise the linux kernel boot can hang on this platform under certain
bios/platform settings.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Tested-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Chris McDermott <lcm@linux.vnet.ibm.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:33 -07:00
Avi Kivity
53fc82f624 KVM: x86 emulator: limit instructions to 15 bytes
commit eb3c79e64a70fb8f7473e30fa07e89c1ecc2c9bb upstream

While we are never normally passed an instruction that exceeds 15 bytes,
smp games can cause us to attempt to interpret one, which will cause
large latencies in non-preempt hosts.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:30 -07:00
Thomas Renninger
e877282500 CPUFREQ: Fix use after free of struct powernow_k8_data
commit 557a701c16553b0b691dbb64ef30361115a80f64 upstream.

Easy fix for a regression introduced in 2.6.31.

On managed CPUs the cpufreq.c core will call driver->exit(cpu) on the
managed cpus and powernow_k8 will free the core's data.

Later driver->get(cpu) function might get called trying to read out the
current freq of a managed cpu and the NULL pointer check does not work on
the freed object -> better set it to NULL.

->get() is unsigned and must return 0 as invalid frequency.

Reference:
http://bugzilla.kernel.org/show_bug.cgi?id=14391

Signed-off-by: Thomas Renninger <trenn@suse.de>
Tested-by: Michal Schmidt <mschmidt@redhat.com>
Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-04-01 15:55:28 -07:00
Linus Torvalds
1bb36e83e3 x86/ptrace: make genregs[32]_get/set more robust
commit 04a1e62c2cec820501f93526ad1e46073b802dc4 upstream.

The loop condition is fragile: we compare an unsigned value to zero, and
then decrement it by something larger than one in the loop.  All the
callers should be passing in appropriately aligned buffer lengths, but
it's better to just not rely on it, and have some appropriate defensive
loop limits.

Acked-by: Roland McGrath <roland@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-01-06 14:26:44 -08:00
Suresh Siddha
43abf240b6 x86, cpuid: Add "volatile" to asm in native_cpuid()
commit 45a94d7cd45ed991914011919e7d40eb6d2546d1 upstream.

xsave_cntxt_init() does something like:

	cpuid(0xd, ..);	// find out what features FP/SSE/.. etc are supported

	xsetbv();	// enable the features known to OS

	cpuid(0xd, ..);	// find out the size of the context for features enabled

Depending on what features get enabled in xsetbv(), value of the
cpuid.eax=0xd.ecx=0.ebx changes correspondingly (representing the
size of the context that is enabled).

As we don't have volatile keyword for native_cpuid(), gcc 4.1.2
optimizes away the second cpuid and the kernel continues to use
the cpuid information obtained before xsetbv(), ultimately leading to kernel
crash on processors supporting more state than the legacy FP/SSE.

Add "volatile" for native_cpuid().

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <1261009542.2745.55.camel@sbs-t61.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2010-01-06 14:26:35 -08:00