Jun Li
ff7bf0e322
ENGR00117147-2 USB clock gating and PHY low power mode.
...
1. If there is no usb devices connectted or all connectted usb
devices are in suspend state, usb host can suspend its whole bus,
then put the PHY into low power mode and close all usb clocks.
2. close all usb clocks for usb device low power mode.
(The patch is splitted 2 patches, this is FSL specific driver
part.)
Signed-off-by: Li Jun <r65092@freescale.com >
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