mirror of
https://github.com/libretro/Mu.git
synced 2026-09-24 15:46:20 +00:00
Cleanups, add PCMCIA slot stuff to ARM
This commit is contained in:
@@ -232,6 +232,7 @@ SOURCES += \
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HEADERS += \
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../../src/dbvz.h \
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../../src/pxa255/pxa255Accessors.c.h \
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debugviewer.h \
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emuwrapper.h \
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mainwindow.h \
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@@ -1392,9 +1392,13 @@ void dbvzLoadBootloader(uint8_t* data, uint32_t size){
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size = 0;
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size = u32Min(size, DBVZ_BOOTLOADER_SIZE);
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//copy size bytes from buffer to bootloader area
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for(index = 0; index < size; index++)
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registerArrayWrite8(DBVZ_REG_SIZE - DBVZ_BOOTLOADER_SIZE + index, data[index]);
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for(index = size; index < DBVZ_BOOTLOADER_SIZE; index++)
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//fill remainig space with 0x00
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for(; index < DBVZ_BOOTLOADER_SIZE; index++)
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registerArrayWrite8(DBVZ_REG_SIZE - DBVZ_BOOTLOADER_SIZE + index, 0x00);
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}
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@@ -19,46 +19,16 @@
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#include "../emulator.h"
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#define PXA255_IO_BASE 0x40000000
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#define PXA255_MEMCTRL_BASE 0x48000000
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uint16_t* pxa255Framebuffer;
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static Pxa255ic tungstenCIc;
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static Pxa255lcd tungstenCLcd;
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//PXA255 register accessors
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static uint8_t pxa255_read_byte(uint32_t addr){
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}
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static uint16_t pxa255_read_half(uint32_t addr){
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}
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static uint32_t pxa255_read_word(uint32_t addr){
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uint32_t out;
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switch(addr >> 16){
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case PXA255_LCD_BASE >> 16:
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pxa255lcdPrvMemAccessF(&tungstenCLcd, addr, 4, false, &out);
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return out;
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default:
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return 0x00000000;
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}
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}
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static void pxa255_write_byte(uint32_t addr, uint8_t value){
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}
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static void pxa255_write_half(uint32_t addr, uint16_t value){
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}
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static void pxa255_write_word(uint32_t addr, uint32_t value){
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switch(addr >> 16){
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case PXA255_LCD_BASE >> 16:
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pxa255lcdPrvMemAccessF(&tungstenCLcd, addr, 4, true, &value);
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return;
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default:
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return;
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}
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}
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#include "pxa255Accessors.c.h"
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bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
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uint32_t mem_offset = 0;
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@@ -69,7 +39,9 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
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return false;
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addr_cache_init();
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memset(mem_areas, 0x00, sizeof(mem_areas));
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//regions
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//ROM
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mem_areas[0].base = PXA255_ROM_START_ADDRESS;
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mem_areas[0].size = TUNGSTEN_C_ROM_SIZE;
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@@ -82,11 +54,18 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
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mem_areas[1].ptr = mem_and_flags + mem_offset;
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mem_offset += TUNGSTEN_C_RAM_SIZE;
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//CPU registers
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mem_areas[2].base = PXA255_REG_START_ADDRESS;
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mem_areas[2].size = 0x40000000;//size of address space, not all of it is mapped
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//PCMCIA0/1
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mem_areas[2].base = PXA255_PCMCIA0_START_ADDRESS;
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mem_areas[2].size = PXA255_PCMCIA0_SIZE + PXA255_PCMCIA1_SIZE;
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mem_areas[2].ptr = NULL;
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//CPU registers
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mem_areas[3].base = PXA255_REG_START_ADDRESS;
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mem_areas[3].size = PXA255_REG_SIZE;//size of address space, not all of it is mapped
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mem_areas[3].ptr = NULL;
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//accessors
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//default
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for(i = 0; i < PXA255_TOTAL_MEMORY_BANKS; i++){
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// will fallback to bad_* on non-memory addresses
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read_byte_map[i] = memory_read_byte;
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@@ -97,16 +76,50 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
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write_word_map[i] = memory_write_word;
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}
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//add PXA255 register range
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for(i = PXA255_START_BANK(PXA255_REG_START_ADDRESS); i <= PXA255_END_BANK(PXA255_REG_START_ADDRESS, mem_areas[2].size); i++){
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read_byte_map[i] = pxa255_read_byte;
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read_half_map[i] = pxa255_read_half;
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read_word_map[i] = pxa255_read_word;
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write_byte_map[i] = pxa255_write_byte;
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write_half_map[i] = pxa255_write_half;
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write_word_map[i] = pxa255_write_word;
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//PCMCIA0
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for(i = PXA255_START_BANK(PXA255_PCMCIA0_START_ADDRESS); i <= PXA255_END_BANK(PXA255_PCMCIA0_START_ADDRESS, PXA255_PCMCIA0_SIZE); i++){
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read_byte_map[i] = pxa255_pcmcia0_read_byte;
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read_half_map[i] = pxa255_pcmcia0_read_half;
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read_word_map[i] = pxa255_pcmcia0_read_word;
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write_byte_map[i] = pxa255_pcmcia0_write_byte;
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write_half_map[i] = pxa255_pcmcia0_write_half;
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write_word_map[i] = pxa255_pcmcia0_write_word;
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}
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//PCMCIA1
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for(i = PXA255_START_BANK(PXA255_PCMCIA1_START_ADDRESS); i <= PXA255_END_BANK(PXA255_PCMCIA1_START_ADDRESS, PXA255_PCMCIA1_SIZE); i++){
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read_byte_map[i] = pxa255_pcmcia1_read_byte;
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read_half_map[i] = pxa255_pcmcia1_read_half;
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read_word_map[i] = pxa255_pcmcia1_read_word;
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write_byte_map[i] = pxa255_pcmcia1_write_byte;
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write_half_map[i] = pxa255_pcmcia1_write_half;
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write_word_map[i] = pxa255_pcmcia1_write_word;
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}
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//IO
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read_byte_map[PXA255_START_BANK(PXA255_IO_BASE)] = pxa255_io_read_byte;
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read_half_map[PXA255_START_BANK(PXA255_IO_BASE)] = bad_read_half;
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read_word_map[PXA255_START_BANK(PXA255_IO_BASE)] = pxa255_io_read_word;
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write_byte_map[PXA255_START_BANK(PXA255_IO_BASE)] = pxa255_io_write_byte;
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write_half_map[PXA255_START_BANK(PXA255_IO_BASE)] = bad_write_half;
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write_word_map[PXA255_START_BANK(PXA255_IO_BASE)] = pxa255_io_write_word;
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//LCD
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read_byte_map[PXA255_START_BANK(PXA255_LCD_BASE)] = bad_read_byte;
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read_half_map[PXA255_START_BANK(PXA255_LCD_BASE)] = bad_read_half;
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read_word_map[PXA255_START_BANK(PXA255_LCD_BASE)] = pxa255_lcd_read_word;
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write_byte_map[PXA255_START_BANK(PXA255_LCD_BASE)] = bad_write_byte;
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write_half_map[PXA255_START_BANK(PXA255_LCD_BASE)] = bad_write_half;
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write_word_map[PXA255_START_BANK(PXA255_LCD_BASE)] = pxa255_lcd_write_word;
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//MEMCTRL
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read_byte_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = bad_read_byte;
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read_half_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = bad_read_half;
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read_word_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = pxa255_memctrl_read_word;
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write_byte_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = bad_write_byte;
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write_half_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = bad_write_half;
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write_word_map[PXA255_START_BANK(PXA255_MEMCTRL_BASE)] = pxa255_memctrl_write_word;
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//set up CPU hardware
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pxa255icInit(&tungstenCIc);
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pxa255lcdInit(&tungstenCLcd, &tungstenCIc);
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128
src/pxa255/pxa255Accessors.c.h
Normal file
128
src/pxa255/pxa255Accessors.c.h
Normal file
@@ -0,0 +1,128 @@
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static uint8_t pxa255_io_read_byte(uint32_t addr){
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//is only vaild for UART stuff
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}
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static uint32_t pxa255_io_read_word(uint32_t addr){
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uint32_t out;
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switch(addr >> 16){
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case PXA255_CLOCK_MANAGER_BASE >> 16:
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case PXA255_POWER_MANAGER_BASE >> 16:
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case PXA255_DMA_BASE >> 16:
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case PXA255_GPIO_BASE >> 16:
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case PXA255_IC_BASE >> 16:
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case PXA255_RTC_BASE >> 16:
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case PXA255_TIMR_BASE >> 16:
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case PXA255_FFUART_BASE >> 16:
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case PXA255_BTUART_BASE >> 16:
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case PXA255_STUART_BASE >> 16:
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//need to implement these
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debugLog("Unimplemented 32 bit PXA255 register read:0x%08X\n", addr);
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return 0x00000000;
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default:
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debugLog("Invalid 32 bit PXA255 register read:0x%08X\n", addr);
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return 0x00000000;
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}
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}
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static void pxa255_io_write_byte(uint32_t addr, uint8_t value){
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//is only vaild for UART stuff
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}
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static void pxa255_io_write_word(uint32_t addr, uint32_t value){
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switch(addr >> 16){
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case PXA255_CLOCK_MANAGER_BASE >> 16:
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case PXA255_POWER_MANAGER_BASE >> 16:
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case PXA255_DMA_BASE >> 16:
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case PXA255_GPIO_BASE >> 16:
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case PXA255_IC_BASE >> 16:
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case PXA255_RTC_BASE >> 16:
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case PXA255_TIMR_BASE >> 16:
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case PXA255_FFUART_BASE >> 16:
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case PXA255_BTUART_BASE >> 16:
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case PXA255_STUART_BASE >> 16:
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//need to implement these
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debugLog("Unimplemented 32 bit PXA255 register write:0x%08X, value:0x%08X\n", addr, value);
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return;
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default:
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debugLog("Invalid 32 bit PXA255 register write:0x%08X, value:0x%08X\n", addr, value);
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return;
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}
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}
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static uint32_t pxa255_lcd_read_word(uint32_t addr){
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uint32_t out;
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pxa255lcdPrvMemAccessF(&tungstenCLcd, addr, 4, false, &out);
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debugLog("32 bit PXA255 LCD register read:0x%08X\n", addr);
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return out;
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}
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static void pxa255_lcd_write_word(uint32_t addr, uint32_t value){
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pxa255lcdPrvMemAccessF(&tungstenCLcd, addr, 4, true, &value);
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debugLog("32 bit PXA255 LCD register write:0x%08X, value:0x%08X\n", addr, value);
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}
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static uint32_t pxa255_memctrl_read_word(uint32_t addr){
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debugLog("32 bit PXA255 MEMCTRL register read:0x%08X\n", addr);
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return 0x00000000;
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}
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static void pxa255_memctrl_write_word(uint32_t addr, uint32_t value){
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debugLog("32 bit PXA255 MEMCTRL register write:0x%08X, value:0x%08X\n", addr, value);
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}
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static uint8_t pxa255_pcmcia0_read_byte(uint32_t addr){
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debugLog("PCMCIA0 8 bit read:0x%08X\n", addr);
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return 0x00;
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}
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static uint16_t pxa255_pcmcia0_read_half(uint32_t addr){
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debugLog("PCMCIA0 16 bit read:0x%08X\n", addr);
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return 0x0000;
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}
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static uint32_t pxa255_pcmcia0_read_word(uint32_t addr){
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debugLog("PCMCIA0 32 bit read:0x%08X\n", addr);
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return 0x00000000;
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}
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static void pxa255_pcmcia0_write_byte(uint32_t addr, uint8_t value){
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debugLog("PCMCIA0 8 bit write:0x%08X, value:0x%02X\n", addr, value);
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}
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static void pxa255_pcmcia0_write_half(uint32_t addr, uint16_t value){
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debugLog("PCMCIA0 16 bit write:0x%08X, value:0x%04X\n", addr, value);
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}
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static void pxa255_pcmcia0_write_word(uint32_t addr, uint32_t value){
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debugLog("PCMCIA0 32 bit write:0x%08X, value:0x%08X\n", addr, value);
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}
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static uint8_t pxa255_pcmcia1_read_byte(uint32_t addr){
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debugLog("PCMCIA1 8 bit read:0x%08X\n", addr);
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return 0x00;
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}
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static uint16_t pxa255_pcmcia1_read_half(uint32_t addr){
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debugLog("PCMCIA1 16 bit read:0x%08X\n", addr);
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return 0x0000;
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}
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static uint32_t pxa255_pcmcia1_read_word(uint32_t addr){
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debugLog("PCMCIA1 32 bit read:0x%08X\n", addr);
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return 0x00000000;
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}
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static void pxa255_pcmcia1_write_byte(uint32_t addr, uint8_t value){
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debugLog("PCMCIA1 8 bit write:0x%08X, value:0x%02X\n", addr, value);
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}
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static void pxa255_pcmcia1_write_half(uint32_t addr, uint16_t value){
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debugLog("PCMCIA1 16 bit write:0x%08X, value:0x%04X\n", addr, value);
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}
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static void pxa255_pcmcia1_write_word(uint32_t addr, uint32_t value){
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debugLog("PCMCIA1 32 bit write:0x%08X, value:0x%08X\n", addr, value);
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}
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@@ -67,12 +67,6 @@ typedef struct ArmCpu{
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// various other cpu config options
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UInt32 vectorBase; //address of vector base
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#ifdef ARM_V6
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Boolean EEE; //endianness one exception entry
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Boolean impreciseAbtWaiting;
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#endif
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ArmCpuMemF memF;
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ArmCpuEmulErr emulErrF;
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ArmCpuHypercall hypercallF;
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@@ -6,6 +6,8 @@
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#include <stddef.h>
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#include <string.h>
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#include "../emulator.h"
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typedef uint64_t UInt64;
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typedef int64_t Int64;
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typedef uint32_t UInt32;
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@@ -15,30 +17,17 @@ typedef int16_t Int16;
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typedef uint8_t UInt8;
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typedef int8_t Int8;
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typedef uint8_t Err;
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typedef bool Boolean;//may need to be uint8_t, thats its type in the original source
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typedef uint8_t Boolean;//must use uint8_t, some functions store extra info in the other bits
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#define errNone 0x00
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#define errInternal 0x01
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/*
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#define _INLINE_ inline __attribute__ ((always_inline))
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#define _UNUSED_ __attribute__((unused))
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*/
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#define _INLINE_ inline
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#define _UNUSED_
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/* runtime stuffs */
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/*
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void err_str(const char* str);
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void err_hex(UInt32 val);
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void err_dec(UInt32 val);
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*/
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#define err_str(x)
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#define err_hex(x)
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#define err_dec(x)
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#define err_str(str) debugLog(str)
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#define err_hex(num) debugLog("0x%X", num)
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#define err_dec(num) debugLog("%d", num)
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#define __mem_zero(mem, len) memset(mem, 0x00, len)
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#define __mem_copy(d, s, sz) memcpy(d, s, sz)
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#define __mem_copy(dst, src, size) memcpy(dst, src, size)
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#endif
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@@ -3,9 +3,14 @@
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#define PXA255_ROM_START_ADDRESS 0x00000000
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#define PXA255_RAM_START_ADDRESS 0xA0000000
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#define PXA255_PCMCIA0_START_ADDRESS 0x20000000
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#define PXA255_PCMCIA1_START_ADDRESS 0x30000000
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#define PXA255_REG_START_ADDRESS 0x40000000
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#define TUNGSTEN_C_ROM_SIZE (10 * 0x100000)//10mb ROM
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#define TUNGSTEN_C_RAM_SIZE (64 * 0x100000)//64mb RAM
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#define PXA255_PCMCIA0_SIZE 0x10000000
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#define PXA255_PCMCIA1_SIZE 0x10000000
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#define PXA255_REG_SIZE 0x0C000000
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#define PXA255_BANK_SCOOT 26
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#define PXA255_NUM_BANKS(areaSize) (((areaSize) >> PXA255_BANK_SCOOT) + ((areaSize) & ((1 << PXA255_BANK_SCOOT) - 1) ? 1 : 0))
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