starred/Mu
1
0
Fork 0
mirror of https://github.com/libretro/Mu.git synced 2026-07-08 17:57:01 +00:00
Code Issues 18 Packages Projects Releases 2 Wiki Activity

Clean ups

Browse Source 
The dynarec is using the segmentation fault handler as a speed up, so debugging will be really hard.
This commit is contained in:
meepingsnesroms
2019-04-24 16:55:31 -07:00
parent 0a58122f4b
commit 55a2e97bc5
3 changed files with 28 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/m515Bus.h
View File

@@ -11,7 +11,7 @@
#define DBVZ_END_BANK(address, size) (DBVZ_START_BANK(address) + DBVZ_NUM_BANKS(size) - 1)
#define DBVZ_BANK_IN_RANGE(bank, address, size) ((bank) >= DBVZ_START_BANK(address) && (bank) <= DBVZ_END_BANK(address, size))
#define DBVZ_BANK_ADDRESS(bank) ((bank) << DBVZ_BANK_SCOOT)
#define DBVZ_TOTAL_MEMORY_BANKS (1 << (32 - DBVZ_BANK_SCOOT))//0x40000 banks for BANK_SCOOT = 14
#define DBVZ_TOTAL_MEMORY_BANKS (1 << (32 - DBVZ_BANK_SCOOT))//0x40000 banks for *_BANK_SCOOT = 14
//chip addresses and sizes
//after boot RAM is at 0x00000000,

29
src/pxa255/pxa255.c
View File

@@ -81,10 +81,10 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
//CPU registers
mem_areas[2].base = PXA255_REG_START_ADDRESS;
mem_areas[2].size = PXA255_REG_SIZE;
mem_areas[2].size = 0x40000000;//size of address space, not all of it is mapped
mem_areas[2].ptr = NULL;
for(i = 0; i < 64; i++){
for(i = 0; i < PXA255_TOTAL_MEMORY_BANKS; i++){
// will fallback to bad_* on non-memory addresses
read_byte_map[i] = memory_read_byte;
read_half_map[i] = memory_read_half;
@@ -94,12 +94,15 @@ bool pxa255Init(uint8_t** returnRom, uint8_t** returnRam){
write_word_map[i] = memory_write_word;
}
read_byte_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_read_byte;
read_half_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_read_half;
read_word_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_read_word;
write_byte_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_write_byte;
write_half_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_write_half;
write_word_map[PXA255_START_BANK(PXA255_REG_START_ADDRESS)] = pxa255_write_word;
//add PXA255 register range
for(i = PXA255_START_BANK(PXA255_REG_START_ADDRESS); i <= PXA255_END_BANK(PXA255_REG_START_ADDRESS, mem_areas[2].size); i++){
read_byte_map[i] = pxa255_read_byte;
read_half_map[i] = pxa255_read_half;
read_word_map[i] = pxa255_read_word;
write_byte_map[i] = pxa255_write_byte;
write_half_map[i] = pxa255_write_half;
write_word_map[i] = pxa255_write_word;
}
//set up CPU hardware
pxa255icInit(&tungstenCIc);
@@ -170,6 +173,12 @@ void pxa255LoadState(uint8_t* data){
}
void pxa255Execute(void){
#if OS_HAS_PAGEFAULT_HANDLER
os_exception_frame_t seh_frame = { NULL, NULL };
os_faulthandler_arm(&seh_frame);
#endif
//TODO: need to set cycle_count_delta with the amout of opcodes to run
cycle_count_delta = -500;//just a test value
@@ -202,6 +211,10 @@ void pxa255Execute(void){
cpu_arm_loop();
}
#if OS_HAS_PAGEFAULT_HANDLER
os_faulthandler_unarm(&seh_frame);
#endif
//render
pxa255lcdFrame(&tungstenCLcd);
}

9
src/tungstenCBus.h
View File

@@ -4,13 +4,16 @@
#define PXA255_ROM_START_ADDRESS 0x00000000
#define PXA255_RAM_START_ADDRESS 0xA0000000
#define PXA255_REG_START_ADDRESS 0x40000000
#define TUNGSTEN_C_ROM_SIZE (4 * 0x100000)//4mb ROM
#define TUNGSTEN_C_ROM_SIZE (10 * 0x100000)//10mb ROM
#define TUNGSTEN_C_RAM_SIZE (64 * 0x100000)//64mb RAM
#define PXA255_REG_SIZE 0x40000000
#define PXA255_BANK_SCOOT 26
#define PXA255_START_BANK(address) ((address) >> PXA255_BANK_SCOOT)
#define PXA255_NUM_BANKS(areaSize) (((areaSize) >> PXA255_BANK_SCOOT) + ((areaSize) & ((1 << PXA255_BANK_SCOOT) - 1) ? 1 : 0))
#define PXA255_START_BANK(address) ((address) >> PXA255_BANK_SCOOT)
#define PXA255_END_BANK(address, size) (PXA255_START_BANK(address) + PXA255_NUM_BANKS(size) - 1)
#define PXA255_BANK_IN_RANGE(bank, address, size) ((bank) >= PXA255_START_BANK(address) && (bank) <= PXA255_END_BANK(address, size))
#define PXA255_BANK_ADDRESS(bank) ((bank) << PXA255_BANK_SCOOT)
#define PXA255_TOTAL_MEMORY_BANKS (1 << (32 - PXA255_BANK_SCOOT))//64 banks for *_BANK_SCOOT = 26
#endif