Block annyoing idle loop

This commit is contained in:
meepingsnesroms
2019-09-12 12:12:47 -07:00
parent 85e9a03796
commit 64950ac431
5 changed files with 41 additions and 8 deletions

View File

@@ -698,6 +698,8 @@ uint32_t sandboxCommand(uint32_t command, void* data){
else{
//disable weird SD chip
patchOsRom(0x333EC6, "0000");//blocks out the slot driver
patchOsRom(0x205C, "0000A0E1");//blocks idle loop jump with NOP
//patchOsRom(0x1FE8, "0000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E1");//blocks idle loop with NOPs
}
}
break;

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@@ -34,10 +34,13 @@
//0xFFFFFE00<->0xFFFFFFFF Bootloader, only reads from UART into RAM and jumps to it, never executed in consumer Palms
//Memory map of Tungsten T3
//This is a map of the boot address ranges, it can be(and is) changed with the MMU
//Boot address ranges, these are changed with the MMU after boot
//0x00000000<->0x003FFFFF ROM
//0xA0000000<->0xA3FFFFFF RAM
//TODO: get the default address ranges Palm OS sets up after boot
//Post boot address ranges:
//0x00000000<->0x003FFFFF RAM
//0x20000000<->0x20FFFFFF ROM
//TODO: add other chips
//VGhpcyBlbXVsYXRvciBpcyBkZWRpY2F0ZWQgdG8gdGhlIGJvdmluZSBtb28gY293cyB0aGF0IG1vby4=

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@@ -221,7 +221,8 @@ void pxa260LoadState(uint8_t* data){
void pxa260Execute(bool wantVideo){
uint32_t index;
pxa260TimingRun(TUNGSTEN_T3_CPU_PLL_FREQUENCY / EMU_FPS * palmClockMultiplier);
//pxa260TimingRun(TUNGSTEN_T3_CPU_PLL_FREQUENCY / EMU_FPS * palmClockMultiplier);
pxa260TimingRun(20000);
//this needs to run at 3.6864 MHz
for(index = 0; index < TUNGSTEN_T3_CPU_CRYSTAL_FREQUENCY / EMU_FPS; index++)

View File

@@ -105,7 +105,7 @@ void pxa260I2cWriteWord(uint32_t address, uint32_t value){
pxa260I2cBuffer |= !!(tps65010I2cExchange(I2C_FLOATING_BUS) & I2C_1);
}
debugLog("I2C transfer(receive) attempted: 0x%02X\n", pxa260I2cBuffer);
//debugLog("I2C transfer(receive) attempted: 0x%02X\n", pxa260I2cBuffer);
pxa260TimingTriggerEvent(PXA260_TIMING_CALLBACK_I2C_RECEIVE_FULL, PXA260_I2C_TRANSFER_DURATION);
}
@@ -113,7 +113,7 @@ void pxa260I2cWriteWord(uint32_t address, uint32_t value){
//send
uint8_t index;
debugLog("I2C transfer(send) attempted: 0x%02X\n", pxa260I2cBuffer);
//debugLog("I2C transfer(send) attempted: 0x%02X\n", pxa260I2cBuffer);
for(index = 0; index < 8; index++)
tps65010I2cExchange((pxa260I2cBuffer & 1 << 7 - index) ? I2C_1 : I2C_0);
@@ -162,7 +162,7 @@ void pxa260I2cTransmitEmpty(void){
pxa260I2cIsr &= 0xFFFA;
pxa260I2cUpdateInterrupt();
debugLog("I2C transmit empty triggered\n");
//debugLog("I2C transmit empty triggered\n");
}
void pxa260I2cReceiveFull(void){
@@ -177,5 +177,5 @@ void pxa260I2cReceiveFull(void){
pxa260I2cIsr &= 0xFFFA;
pxa260I2cUpdateInterrupt();
debugLog("I2C receive full triggered\n");
//debugLog("I2C receive full triggered\n");
}

View File

@@ -6,17 +6,30 @@
#define UDCCR 0x0000
//...
#define UDCCS0 0x0010
//...
#define UICR0 0x0050
#define UICR1 0x0054
//...
#define UFNHR 0x0060
uint8_t pxa260UdcUdccr;
uint8_t pxa260UdcUdccs0;
uint8_t pxa260UdcUicr0;
uint8_t pxa260UdcUicr1;
uint8_t pxa260UdcUfnhr;
void pxa260UdcReset(void){
pxa260UdcUdccr = 0xA0;
//...
pxa260UdcUdccs0 = 0x00;
//...
pxa260UdcUicr0 = 0xFF;
pxa260UdcUicr1 = 0xFF;
//...
pxa260UdcUfnhr = 0x40;
}
uint32_t pxa260UdcReadWord(uint32_t address){
@@ -28,10 +41,19 @@ uint32_t pxa260UdcReadWord(uint32_t address){
debugLog("Snoot boop, PC:0x%08X\n", pxa260GetPc());
return pxa260UdcUdccr;
case UDCCS0:
//TODO: need to | with RECEIVE FIFO NOT EMPTY
return pxa260UdcUdccs0;
case UICR0:
//simple read, no actions needed
return pxa260UdcUicr0;
case UICR1:
return pxa260UdcUicr0;
case UFNHR:
return pxa260UdcUfnhr;
default:
debugLog("Unimplimented 32 bit PXA260 UDC register read:0x%04X\n", address);
return 0x00000000;
@@ -53,6 +75,11 @@ void pxa260UdcWriteWord(uint32_t address, uint32_t value){
//TODO: need to update interrupts
return;
case UICR1:
pxa260UdcUicr1 = value & 0xFF;
//TODO: need to update interrupts
return;
default:
debugLog("Unimplimented 32 bit PXA260 UDC register write:0x%04X, value:0x%02X\n", address, value);
return;