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https://github.com/libretro/Mu.git
synced 2026-09-22 22:56:12 +00:00
Block annyoing idle loop
This commit is contained in:
@@ -698,6 +698,8 @@ uint32_t sandboxCommand(uint32_t command, void* data){
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else{
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//disable weird SD chip
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patchOsRom(0x333EC6, "0000");//blocks out the slot driver
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patchOsRom(0x205C, "0000A0E1");//blocks idle loop jump with NOP
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//patchOsRom(0x1FE8, "0000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E10000A0E1");//blocks idle loop with NOPs
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}
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}
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break;
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@@ -34,10 +34,13 @@
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//0xFFFFFE00<->0xFFFFFFFF Bootloader, only reads from UART into RAM and jumps to it, never executed in consumer Palms
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//Memory map of Tungsten T3
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//This is a map of the boot address ranges, it can be(and is) changed with the MMU
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//Boot address ranges, these are changed with the MMU after boot
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//0x00000000<->0x003FFFFF ROM
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//0xA0000000<->0xA3FFFFFF RAM
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//TODO: get the default address ranges Palm OS sets up after boot
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//Post boot address ranges:
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//0x00000000<->0x003FFFFF RAM
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//0x20000000<->0x20FFFFFF ROM
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//TODO: add other chips
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//VGhpcyBlbXVsYXRvciBpcyBkZWRpY2F0ZWQgdG8gdGhlIGJvdmluZSBtb28gY293cyB0aGF0IG1vby4=
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@@ -221,7 +221,8 @@ void pxa260LoadState(uint8_t* data){
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void pxa260Execute(bool wantVideo){
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uint32_t index;
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pxa260TimingRun(TUNGSTEN_T3_CPU_PLL_FREQUENCY / EMU_FPS * palmClockMultiplier);
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//pxa260TimingRun(TUNGSTEN_T3_CPU_PLL_FREQUENCY / EMU_FPS * palmClockMultiplier);
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pxa260TimingRun(20000);
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//this needs to run at 3.6864 MHz
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for(index = 0; index < TUNGSTEN_T3_CPU_CRYSTAL_FREQUENCY / EMU_FPS; index++)
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@@ -105,7 +105,7 @@ void pxa260I2cWriteWord(uint32_t address, uint32_t value){
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pxa260I2cBuffer |= !!(tps65010I2cExchange(I2C_FLOATING_BUS) & I2C_1);
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}
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debugLog("I2C transfer(receive) attempted: 0x%02X\n", pxa260I2cBuffer);
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//debugLog("I2C transfer(receive) attempted: 0x%02X\n", pxa260I2cBuffer);
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pxa260TimingTriggerEvent(PXA260_TIMING_CALLBACK_I2C_RECEIVE_FULL, PXA260_I2C_TRANSFER_DURATION);
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}
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@@ -113,7 +113,7 @@ void pxa260I2cWriteWord(uint32_t address, uint32_t value){
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//send
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uint8_t index;
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debugLog("I2C transfer(send) attempted: 0x%02X\n", pxa260I2cBuffer);
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//debugLog("I2C transfer(send) attempted: 0x%02X\n", pxa260I2cBuffer);
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for(index = 0; index < 8; index++)
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tps65010I2cExchange((pxa260I2cBuffer & 1 << 7 - index) ? I2C_1 : I2C_0);
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@@ -162,7 +162,7 @@ void pxa260I2cTransmitEmpty(void){
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pxa260I2cIsr &= 0xFFFA;
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pxa260I2cUpdateInterrupt();
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debugLog("I2C transmit empty triggered\n");
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//debugLog("I2C transmit empty triggered\n");
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}
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void pxa260I2cReceiveFull(void){
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@@ -177,5 +177,5 @@ void pxa260I2cReceiveFull(void){
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pxa260I2cIsr &= 0xFFFA;
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pxa260I2cUpdateInterrupt();
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debugLog("I2C receive full triggered\n");
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//debugLog("I2C receive full triggered\n");
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}
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@@ -6,17 +6,30 @@
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#define UDCCR 0x0000
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//...
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#define UDCCS0 0x0010
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//...
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#define UICR0 0x0050
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#define UICR1 0x0054
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//...
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#define UFNHR 0x0060
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uint8_t pxa260UdcUdccr;
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uint8_t pxa260UdcUdccs0;
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uint8_t pxa260UdcUicr0;
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uint8_t pxa260UdcUicr1;
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uint8_t pxa260UdcUfnhr;
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void pxa260UdcReset(void){
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pxa260UdcUdccr = 0xA0;
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//...
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pxa260UdcUdccs0 = 0x00;
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//...
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pxa260UdcUicr0 = 0xFF;
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pxa260UdcUicr1 = 0xFF;
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//...
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pxa260UdcUfnhr = 0x40;
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}
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uint32_t pxa260UdcReadWord(uint32_t address){
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@@ -28,10 +41,19 @@ uint32_t pxa260UdcReadWord(uint32_t address){
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debugLog("Snoot boop, PC:0x%08X\n", pxa260GetPc());
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return pxa260UdcUdccr;
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case UDCCS0:
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//TODO: need to | with RECEIVE FIFO NOT EMPTY
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return pxa260UdcUdccs0;
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case UICR0:
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//simple read, no actions needed
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return pxa260UdcUicr0;
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case UICR1:
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return pxa260UdcUicr0;
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case UFNHR:
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return pxa260UdcUfnhr;
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default:
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debugLog("Unimplimented 32 bit PXA260 UDC register read:0x%04X\n", address);
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return 0x00000000;
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@@ -53,6 +75,11 @@ void pxa260UdcWriteWord(uint32_t address, uint32_t value){
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//TODO: need to update interrupts
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return;
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case UICR1:
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pxa260UdcUicr1 = value & 0xFF;
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//TODO: need to update interrupts
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return;
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default:
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debugLog("Unimplimented 32 bit PXA260 UDC register write:0x%04X, value:0x%02X\n", address, value);
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return;
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