Thomas Bogendoerfer c7c6b39050 [MIPS] Use correct dma flushing in dma_cache_sync() ...

Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2008-01-29 10:14:58 +00:00

8.6 KiB

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