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linux-legacy/arch/xtensa/mm/misc.S
Chris Zankel 0b2c3afdaa [XTENSA] Fix icache flush for cache aliasing 
Set the execution bit in the temporary TLB when we flush the
instruction cache.

Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13 17:08:18 -08:00

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