Catalin Marinas b3a1bde4db [ARM] 4108/2: Allow multiple GIC interrupt controllers in a system ...

The current implementation only assumes one GIC to be present in the
system. However, there are platforms with more than one cascaded interrupt
controllers (RealView/EB MPCore for example).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2007-02-15 14:44:10 +00:00

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