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hw/arm/smmu-common: Make iommu ops part of SMMUState

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Make iommu ops part of SMMUState and set to the current default smmu_ops.
No functional change intended. This will allow SMMUv3 accel implementation
to set a different iommu ops later.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Message-id: 20260126104342.253965-5-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Shameer Kolothum
2026-01-29 13:32:04 +00:00
committed by Peter Maydell
parent 8d9633f1ed
commit 797fffedac
2 changed files with 6 additions and 2 deletions
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7
hw/arm/smmu-common.c
View File

@@ -959,6 +959,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
"smmu-secure-memory-view");
}
if (!s->iommu_ops) {
s->iommu_ops = &smmu_ops;
}
/*
* We only allow default PCIe Root Complex(pcie.0) or pxb-pcie based extra
* root complexes to be associated with SMMU.
@@ -978,9 +981,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
}
if (s->smmu_per_bus) {
pci_setup_iommu_per_bus(pci_bus, &smmu_ops, s);
pci_setup_iommu_per_bus(pci_bus, s->iommu_ops, s);
} else {
pci_setup_iommu(pci_bus, &smmu_ops, s);
pci_setup_iommu(pci_bus, s->iommu_ops, s);
}
return;
}

1
include/hw/arm/smmu-common.h
View File

@@ -166,6 +166,7 @@ struct SMMUState {
AddressSpace memory_as;
MemoryRegion *secure_memory;
AddressSpace secure_memory_as;
const PCIIOMMUOps *iommu_ops;
};
struct SMMUBaseClass {