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target/mips: add Octeon COP2 crypto state

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Add the common architectural state needed by Octeon's selector-driven
COP2 crypto interfaces. This includes storage for the base hash, AES,
CRC, GFM, 3DES, KASUMI, and overlapping HSH/SHA512/SHA3/SNOW3G/ZUC
selector windows.

Keep selector values and helper-local aliasing logic out of the CPU state
header so the state definition remains limited to architectural storage.
Helper code uses the same register banks instead of adding
non-architectural shadow state. Model the SHA3 view as a direct 25-lane
alias of the architectural HSH DAT/IV/SHA3_DAT24 storage.

Migrate the state in an Octeon-only subsection so non-Octeon CPU models
do not grow migration data.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-1-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
This commit is contained in:
James Hilliard
2026-06-08 12:59:26 -06:00
committed by Philippe Mathieu-Daudé
parent 916ab315cc
commit 304df6d35e
2 changed files with 53 additions and 0 deletions
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26
target/mips/cpu.h
View File

@@ -537,6 +537,30 @@ struct TCState {
};
struct MIPSITUState;
typedef struct MIPSOcteonCryptoState {
union {
struct {
uint64_t hsh_dat[16];
uint64_t hsh_iv[8];
uint64_t sha3_dat24;
};
uint64_t sha3_dat[25];
};
uint64_t des3_key[3];
uint64_t des3_iv;
uint64_t des3_result;
uint64_t aes_resinp[2];
uint64_t aes_iv[2];
uint64_t aes_key[4];
uint32_t crc_poly;
uint32_t crc_iv;
uint64_t gfm_mul[2];
uint64_t gfm_resinp[2];
uint16_t gfm_poly;
uint8_t aes_keylen;
uint8_t crc_len;
} MIPSOcteonCryptoState;
typedef struct CPUArchState {
TCState active_tc;
CPUMIPSFPUContext active_fpu;
@@ -558,6 +582,8 @@ typedef struct CPUArchState {
#define MSAIR_ProcID 8
#define MSAIR_Rev 0
MIPSOcteonCryptoState octeon_crypto;
/*
* CP0 Register 0
*/

27
target/mips/system/machine.c
View File

@@ -279,6 +279,32 @@ static const VMStateDescription mips_vmstate_octeon_multiplier = {
}
};
static const VMStateDescription mips_vmstate_octeon_crypto = {
.name = "cpu/octeon_crypto",
.version_id = 1,
.minimum_version_id = 1,
.needed = mips_octeon_needed,
.fields = (const VMStateField[]) {
VMSTATE_UINT64_ARRAY(env.octeon_crypto.hsh_dat, MIPSCPU, 16),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.hsh_iv, MIPSCPU, 8),
VMSTATE_UINT64(env.octeon_crypto.sha3_dat24, MIPSCPU),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.des3_key, MIPSCPU, 3),
VMSTATE_UINT64(env.octeon_crypto.des3_iv, MIPSCPU),
VMSTATE_UINT64(env.octeon_crypto.des3_result, MIPSCPU),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_resinp, MIPSCPU, 2),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_iv, MIPSCPU, 2),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.aes_key, MIPSCPU, 4),
VMSTATE_UINT32(env.octeon_crypto.crc_poly, MIPSCPU),
VMSTATE_UINT32(env.octeon_crypto.crc_iv, MIPSCPU),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.gfm_mul, MIPSCPU, 2),
VMSTATE_UINT64_ARRAY(env.octeon_crypto.gfm_resinp, MIPSCPU, 2),
VMSTATE_UINT16(env.octeon_crypto.gfm_poly, MIPSCPU),
VMSTATE_UINT8(env.octeon_crypto.aes_keylen, MIPSCPU),
VMSTATE_UINT8(env.octeon_crypto.crc_len, MIPSCPU),
VMSTATE_END_OF_LIST()
}
};
const VMStateDescription vmstate_mips_cpu = {
.name = "cpu",
.version_id = 21,
@@ -396,6 +422,7 @@ const VMStateDescription vmstate_mips_cpu = {
.subsections = (const VMStateDescription * const []) {
&mips_vmstate_timer,
&mips_vmstate_octeon_multiplier,
&mips_vmstate_octeon_crypto,
NULL
}
};