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target/hexagon: Add vmstate representation

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Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
This commit is contained in:
Brian Cain
2026-06-22 15:28:08 -07:00
committed by Brian Cain
parent b7f4346388
commit 05b4e47b74
3 changed files with 39 additions and 0 deletions
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3
target/hexagon/cpu.c
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@@ -382,6 +382,9 @@ static void hexagon_cpu_class_init(ObjectClass *c, const void *data)
cc->gdb_stop_before_watchpoint = true;
cc->gdb_core_xml_file = "hexagon-core.xml";
cc->disas_set_info = hexagon_cpu_disas_set_info;
#ifndef CONFIG_USER_ONLY
dc->vmsd = &vmstate_hexagon_cpu;
#endif
cc->tcg_ops = &hexagon_tcg_ops;
}

4
target/hexagon/internal.h
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@@ -31,4 +31,8 @@ void hexagon_debug(CPUHexagonState *env);
extern const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS];
#ifndef CONFIG_USER_ONLY
extern const VMStateDescription vmstate_hexagon_cpu;
#endif
#endif

32
target/hexagon/machine.c Normal file
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@@ -0,0 +1,32 @@
/*
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "migration/vmstate.h"
#include "cpu.h"
const VMStateDescription vmstate_hexagon_cpu = {
.name = "cpu",
.version_id = 1,
.minimum_version_id = 1,
.fields = (const VMStateField[]) {
VMSTATE_UINT32_ARRAY(env.gpr, HexagonCPU, TOTAL_PER_THREAD_REGS),
VMSTATE_UINT32_ARRAY(env.pred, HexagonCPU, NUM_PREGS),
VMSTATE_UINT32_ARRAY(env.t_sreg, HexagonCPU, NUM_SREGS),
VMSTATE_UINT32_ARRAY(env.greg, HexagonCPU, NUM_GREGS),
VMSTATE_UINT32(env.next_PC, HexagonCPU),
VMSTATE_UINT32(env.tlb_lock_state, HexagonCPU),
VMSTATE_UINT32(env.k0_lock_state, HexagonCPU),
VMSTATE_UINT32(env.tlb_lock_count, HexagonCPU),
VMSTATE_UINT32(env.k0_lock_count, HexagonCPU),
VMSTATE_UINT32(env.threadId, HexagonCPU),
VMSTATE_UINT32(env.cause_code, HexagonCPU),
VMSTATE_UINT32(env.wait_next_pc, HexagonCPU),
VMSTATE_UINT64(env.t_cycle_count, HexagonCPU),
VMSTATE_END_OF_LIST()
},
};