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target/arm: Handle SME-without-SVE on change of EL
aarch64_sve_change_el() currently assumes that SME implies SVE, and will return without doing anything if SVE is not implemented, skipping a possible requirement to change the vector register state because the SME vector length has changed. Update it to handle SME also. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20260202133353.2231685-8-peter.maydell@linaro.org
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@@ -10139,8 +10139,8 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
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int old_len, new_len;
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bool old_a64, new_a64, sm;
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/* Nothing to do if no SVE. */
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if (!cpu_isar_feature(aa64_sve, cpu)) {
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/* Nothing to do if no SVE or SME. */
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if (!cpu_isar_feature(aa64_sve, cpu) && !cpu_isar_feature(aa64_sme, cpu)) {
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return;
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}
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