target/arm: Handle SME-without-SVE on change of EL

aarch64_sve_change_el() currently assumes that SME implies
SVE, and will return without doing anything if SVE is not
implemented, skipping a possible requirement to change
the vector register state because the SME vector length
has changed. Update it to handle SME also.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260202133353.2231685-8-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell
2026-02-18 18:40:14 +00:00
parent 8a21e4e278
commit 5801dc1b3b

View File

@@ -10139,8 +10139,8 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el,
int old_len, new_len;
bool old_a64, new_a64, sm;
/* Nothing to do if no SVE. */
if (!cpu_isar_feature(aa64_sve, cpu)) {
/* Nothing to do if no SVE or SME. */
if (!cpu_isar_feature(aa64_sve, cpu) && !cpu_isar_feature(aa64_sme, cpu)) {
return;
}