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target/arm: teach arm_cpu_has_work about halting reasons

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With the advent of WFE and WFI we need to pay closer attention to the
reason why the vCPU may be sleeping to figure out if we should wake
it up.

Create env->halt_reason to track this and then re-order the tests so
we:

  - ignore everything is the vCPU is powered off
  - wake up if the event_register is set and we were in a WFE
  - otherwise any IRQ event does wake the vCPU up.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20260529082948.363931-3-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Alex Bennée
2026-05-29 09:29:41 +01:00
committed by Peter Maydell
parent fc5a32f593
commit 6fd2fcdc61
7 changed files with 66 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
target/arm/arm-powerctl.c
View File

@@ -78,7 +78,7 @@ static void arm_set_cpu_on_async_work(CPUState *target_cpu_state,
/* Finally set the power status */
assert(bql_locked());
target_cpu->power_state = PSCI_ON;
arm_set_cpu_power_state(target_cpu, PSCI_ON);
}
int arm_set_cpu_on(uint64_t cpuid, uint64_t entry, uint64_t context_id,
@@ -186,7 +186,7 @@ static void arm_set_cpu_on_and_reset_async_work(CPUState *target_cpu_state,
/* Finally set the power status */
assert(bql_locked());
target_cpu->power_state = PSCI_ON;
arm_set_cpu_power_state(target_cpu, PSCI_ON);
}
int arm_set_cpu_on_and_reset(uint64_t cpuid)
@@ -239,7 +239,7 @@ static void arm_set_cpu_off_async_work(CPUState *target_cpu_state,
ARMCPU *target_cpu = ARM_CPU(target_cpu_state);
assert(bql_locked());
target_cpu->power_state = PSCI_OFF;
arm_set_cpu_power_state(target_cpu, PSCI_OFF);
target_cpu_state->halted = 1;
target_cpu_state->exception_index = EXCP_HLT;
}

40
target/arm/cpu.c
View File

@@ -145,18 +145,36 @@ static bool arm_cpu_has_work(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
if (cpu->env.event_register) {
return true;
}
/*
* Only another PSCI call can wake the CPU up in which case the
* power_state would be set by arm_set_cpu_on_and_reset_async_work()
*/
if (cpu->power_state == PSCI_OFF) {
g_assert(cpu->env.halt_reason == HALT_PSCI);
return false;
}
return (cpu->power_state != PSCI_OFF)
&& cpu_test_interrupt(cs,
CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD
| CPU_INTERRUPT_NMI | CPU_INTERRUPT_VINMI | CPU_INTERRUPT_VFNMI
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VSERR
| CPU_INTERRUPT_EXITTB);
/*
* A wake-up event should only wake us if we are halted on a WFE
*/
if (cpu->env.halt_reason == HALT_WFE && cpu->env.event_register) {
cpu->env.halt_reason = NOT_HALTED;
return true;
}
/*
* Otherwise pretty much any IRQ would wake us up
*/
if (cpu_test_interrupt(cs,
CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD
| CPU_INTERRUPT_NMI | CPU_INTERRUPT_VINMI | CPU_INTERRUPT_VFNMI
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ | CPU_INTERRUPT_VSERR
| CPU_INTERRUPT_EXITTB)) {
cpu->env.halt_reason = NOT_HALTED;
return true;
}
return false;
}
#endif /* !CONFIG_USER_ONLY */
@@ -327,7 +345,7 @@ static void arm_cpu_reset_hold(Object *obj, ResetType type)
env->vfp.xregs[ARM_VFP_MVFR1] = cpu->isar.mvfr1;
env->vfp.xregs[ARM_VFP_MVFR2] = cpu->isar.mvfr2;
cpu->power_state = cs->start_powered_off ? PSCI_OFF : PSCI_ON;
arm_set_cpu_power_state(cpu, cs->start_powered_off ? PSCI_OFF : PSCI_ON);
if (arm_feature(env, ARM_FEATURE_AARCH64)) {
/* 64 bit CPUs always start in 64 bit mode */

16
target/arm/cpu.h
View File

@@ -224,6 +224,19 @@ typedef enum ARMFPStatusFlavour {
/* Architecturally there are 128 PPIs in a GICv5 */
#define GICV5_NUM_PPIS 128
/**
* ARMHaltReason - the reason we have entered halt state
*
* To be able to correctly wake up via arm_cpu_has_work() we need to
* track the reason we went to sleep.
*/
typedef enum {
NOT_HALTED = 0,
HALT_PSCI,
HALT_WFI,
HALT_WFE
} ARMHaltReason;
typedef struct CPUArchState {
/* Regs for current mode. */
uint32_t regs[16];
@@ -746,6 +759,9 @@ typedef struct CPUArchState {
/* Optional fault info across tlb lookup. */
ARMMMUFaultInfo *tlb_fi;
/* Reason the CPU is halted */
ARMHaltReason halt_reason;
/*
* The event register is shared by all ARM profiles (A/R/M),
* so it is stored in the top-level CPU state.

11
target/arm/internals.h
View File

@@ -2063,4 +2063,15 @@ bool arm_cpu_match_cpreg_mig_tolerance(ARMCPU *cpu, uint64_t kvmidx,
ARMCPRegMigToleranceType type);
/**
* arm_set_cpu_power_state() - set power state synced with halt_reason
*/
static inline void arm_set_cpu_power_state(ARMCPU *cpu, ARMPSCIState state)
{
CPUARMState *env = &cpu->env;
cpu->power_state = state;
env->halt_reason = state == PSCI_OFF ? HALT_PSCI : NOT_HALTED;
}
#endif

5
target/arm/kvm.c
View File

@@ -1149,11 +1149,12 @@ static int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
if (cap_has_mp_state) {
struct kvm_mp_state mp_state;
int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
ARMPSCIState state;
if (ret) {
return ret;
}
cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
PSCI_OFF : PSCI_ON;
state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? PSCI_OFF : PSCI_ON;
arm_set_cpu_power_state(cpu, state);
}
return 0;
}

2
target/arm/machine.c
View File

@@ -916,7 +916,7 @@ static int get_power(QEMUFile *f, void *opaque, size_t size,
{
ARMCPU *cpu = opaque;
bool powered_off = qemu_get_byte(f);
cpu->power_state = powered_off ? PSCI_OFF : PSCI_ON;
arm_set_cpu_power_state(cpu, powered_off ? PSCI_OFF : PSCI_ON);
return 0;
}

3
target/arm/tcg/op_helper.c
View File

@@ -402,6 +402,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len)
target_el);
}
env->halt_reason = HALT_WFI;
cs->exception_index = EXCP_HLT;
cs->halted = 1;
cpu_loop_exit(cs);
@@ -463,6 +464,7 @@ void HELPER(wfit)(CPUARMState *env, uint32_t rd)
} else {
timer_mod(cpu->wfxt_timer, nexttick);
}
env->halt_reason = HALT_WFI;
cs->exception_index = EXCP_HLT;
cs->halted = 1;
cpu_loop_exit(cs);
@@ -507,6 +509,7 @@ void HELPER(wfe)(CPUARMState *env)
return;
}
env->halt_reason = HALT_WFE;
cs->exception_index = EXCP_HLT;
cs->halted = 1;
cpu_loop_exit(cs);