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docs/specs/aspeed-intc: Remove GIC 128 - 136
The GIC interrupts 128 - 136 were only used by the AST2700 A0 SoC. Since the AST2700 A0 has been deprecated, these interrupt definitions are no longer needed. This commit removes them to clean up the codebase. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250901040808.1454742-5-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin
committed by
Cédric Le Goater
Cédric Le Goater
parent
14ecbe9fb2
commit
798c442df7
@@ -47,18 +47,7 @@ Bit GIC
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9 201
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==== ====
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AST2700 A0
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----------
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It has only one INTC controller, and currently, only GIC 128-136 is supported.
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To support both AST2700 A1 and AST2700 A0, there are 10 OR gates in the INTC,
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with gates 1 to 9 supporting GIC 128-136.
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Design for GICINT 132
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---------------------
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The orgate has interrupt sources ranging from 0 to 31, with its output pin
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connected to INTC. The output pin is then connected to GIC 132.
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Block Diagram of GICINT 196 for AST2700 A1 and GICINT 132 for AST2700 A0
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Block Diagram of GICINT 196 for AST2700 A1
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------------------------------------------------------------------------
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.. code-block::
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@@ -68,69 +57,38 @@ Block Diagram of GICINT 196 for AST2700 A1 and GICINT 132 for AST2700 A0
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| To GICINT196 |
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| |
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| ETH1 |-----------| |--------------------------| |--------------| |
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| -------->|0 | | INTCIO | | orgates[0] | |
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| ------->|0 | | INTCIO | | orgates[0] | |
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| ETH2 | 4| orgates[0]------>|inpin[0]-------->outpin[0]|------->| 0 | |
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| -------->|1 5| orgates[1]------>|inpin[1]-------->outpin[1]|------->| 1 | |
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| ------->|1 5| orgates[1]------>|inpin[1]-------->outpin[1]|------->| 1 | |
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| ETH3 | 6| orgates[2]------>|inpin[2]-------->outpin[2]|------->| 2 | |
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| -------->|2 19| orgates[3]------>|inpin[3]-------->outpin[3]|------->| 3 OR[0:9] |-----| |
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| ------->|2 19| orgates[3]------>|inpin[3]-------->outpin[3]|------->| 3 OR[0:9] |-----| |
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| UART0 | 20|-->orgates[4]------>|inpin[4]-------->outpin[4]|------->| 4 | | |
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| -------->|7 21| orgates[5]------>|inpin[5]-------->outpin[5]|------->| 5 | | |
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| ------->|7 21| orgates[5]------>|inpin[5]-------->outpin[5]|------->| 5 | | |
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| UART1 | 22| orgates[6]------>|inpin[6]-------->outpin[6]|------->| 6 | | |
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| -------->|8 23| orgates[7]------>|inpin[7]-------->outpin[7]|------->| 7 | | |
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| ------->|8 23| orgates[7]------>|inpin[7]-------->outpin[7]|------->| 7 | | |
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| UART2 | 24| orgates[8]------>|inpin[8]-------->outpin[8]|------->| 8 | | |
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| -------->|9 25| orgates[9]------>|inpin[9]-------->outpin[9]|------->| 9 | | |
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| ------->|9 25| orgates[9]------>|inpin[9]-------->outpin[9]|------->| 9 | | |
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| UART3 | 26| |--------------------------| |--------------| | |
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| ---------|10 27| | |
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| ------->|10 27| | |
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| UART5 | 28| | |
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| -------->|11 29| | |
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| ------->|11 29| | |
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| UART6 | | | |
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| -------->|12 30| |-----------------------------------------------------------------------| |
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| ------->|12 30| |-----------------------------------------------------------------------| |
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| UART7 | 31| | |
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| -------->|13 | | |
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| UART8 | OR[0:31] | | |------------------------------| |----------| |
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| -------->|14 | | | INTC | | GIC | |
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| UART9 | | | |inpin[0:0]--------->outpin[0] |---------->|192 | |
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| -------->|15 | | |inpin[0:1]--------->outpin[1] |---------->|193 | |
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| UART10 | | | |inpin[0:2]--------->outpin[2] |---------->|194 | |
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| -------->|16 | | |inpin[0:3]--------->outpin[3] |---------->|195 | |
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| UART11 | | |--------------> |inpin[0:4]--------->outpin[4] |---------->|196 | |
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| -------->|17 | |inpin[0:5]--------->outpin[5] |---------->|197 | |
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| UART12 | | |inpin[0:6]--------->outpin[6] |---------->|198 | |
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| -------->|18 | |inpin[0:7]--------->outpin[7] |---------->|199 | |
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| |-----------| |inpin[0:8]--------->outpin[8] |---------->|200 | |
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| |inpin[0:9]--------->outpin[9] |---------->|201 | |
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|-------------------------------------------------------------------------------------------------------|
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|-------------------------------------------------------------------------------------------------------|
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| ETH1 |-----------| orgates[1]------->|inpin[1]----------->outpin[10]|---------->|128 | |
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| -------->|0 | orgates[2]------->|inpin[2]----------->outpin[11]|---------->|129 | |
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| ETH2 | 4| orgates[3]------->|inpin[3]----------->outpin[12]|---------->|130 | |
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| -------->|1 5| orgates[4]------->|inpin[4]----------->outpin[13]|---------->|131 | |
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| ETH3 | 6|---->orgates[5]------->|inpin[5]----------->outpin[14]|---------->|132 | |
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| -------->|2 19| orgates[6]------->|inpin[6]----------->outpin[15]|---------->|133 | |
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| UART0 | 20| orgates[7]------->|inpin[7]----------->outpin[16]|---------->|134 | |
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| -------->|7 21| orgates[8]------->|inpin[8]----------->outpin[17]|---------->|135 | |
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| UART1 | 22| orgates[9]------->|inpin[9]----------->outpin[18]|---------->|136 | |
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| -------->|8 23| |------------------------------| |----------| |
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| UART2 | 24| |
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| -------->|9 25| AST2700 A0 Design |
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| UART3 | 26| |
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| -------->|10 27| |
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| UART5 | 28| |
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| -------->|11 29| GICINT132 |
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| UART6 | | |
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| -------->|12 30| |
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| UART7 | 31| |
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| -------->|13 | |
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| UART8 | OR[0:31] | |
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| -------->|14 | |
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| UART9 | | |
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| -------->|15 | |
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| UART10 | | |
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| -------->|16 | |
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| UART11 | | |
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| -------->|17 | |
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| UART12 | | |
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| -------->|18 | |
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| |-----------| |
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| ------->|13 | | |
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| UART8 | OR[0:31] | | |-----------------------------| |----------| |
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| ------->|14 | | | INTC | | GIC | |
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| UART9 | | | |inpin[0:0]--------->outpin[0]|--------->|192 | |
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| ------->|15 | | |inpin[0:1]--------->outpin[1]|--------->|193 | |
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| UART10 | | | |inpin[0:2]--------->outpin[2]|--------->|194 | |
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| ------->|16 | | |inpin[0:3]--------->outpin[3]|--------->|195 | |
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| UART11 | | |--------------> |inpin[0:4]--------->outpin[4]|--------->|196 | |
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| ------->|17 | |inpin[0:5]--------->outpin[5]|--------->|197 | |
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| UART12 | | |inpin[0:6]--------->outpin[6]|--------->|198 | |
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| ------->|18 | |inpin[0:7]--------->outpin[7]|--------->|199 | |
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| |-----------| |inpin[0:8]--------->outpin[8]|--------->|200 | |
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| |inpin[0:9]--------->outpin[9]|--------->|201 | |
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| |-----------------------------| |----------| |
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|-------------------------------------------------------------------------------------------------------|
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