disas/riscv: Make rv_decode::cfg const

Disassembler is not expected to alter the CPU config.
Besides, all other RISC-V methods takes a const RISCVCPUConfig.
Make the @cfg field of the rv_decode structure const, passing
a const pointer to disasm_inst().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260202222412.24923-6-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2026-01-29 15:56:27 +01:00
parent c87ef9d18a
commit 8a00198ab4
2 changed files with 4 additions and 3 deletions

View File

@@ -5409,7 +5409,7 @@ static void decode_inst_decompress(rv_decode *dec, rv_isa isa)
/* disassemble instruction */
static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
RISCVCPUConfig *cfg)
const RISCVCPUConfig *cfg)
{
rv_decode dec = { 0 };
dec.pc = pc;
@@ -5509,7 +5509,8 @@ print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
}
g_autoptr(GString) str =
disasm_inst(isa, memaddr, inst, (RISCVCPUConfig *)info->target_info);
disasm_inst(isa, memaddr, inst,
(const RISCVCPUConfig *)info->target_info);
(*info->fprintf_func)(info->stream, "%s", str->str);
return len;

View File

@@ -189,7 +189,7 @@ typedef struct {
} rv_opcode_data;
typedef struct {
RISCVCPUConfig *cfg;
const RISCVCPUConfig *cfg;
uint64_t pc;
uint64_t inst;
const rv_opcode_data *opcode_data;