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target/hexagon: Add imported macro, attr defs for sysemu

Browse Source 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
This commit is contained in:
Brian Cain
2026-06-22 15:28:04 -07:00
committed by Brian Cain
parent 037cdf1102
commit b3ac2be499
2 changed files with 504 additions and 13 deletions
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35
target/hexagon/attribs_def.h.inc
View File

@@ -52,6 +52,9 @@ DEF_ATTRIB(REGWRSIZE_4B, "Memory width is 4 bytes", "", "")
DEF_ATTRIB(REGWRSIZE_8B, "Memory width is 8 bytes", "", "")
DEF_ATTRIB(MEMLIKE, "Memory-like instruction", "", "")
DEF_ATTRIB(MEMLIKE_PACKET_RULES, "follows Memory-like packet rules", "", "")
DEF_ATTRIB(CACHEOP, "Cache operation", "", "")
DEF_ATTRIB(COPBYADDRESS, "Cache operation by address", "", "")
DEF_ATTRIB(COPBYIDX, "Cache operation by index", "", "")
DEF_ATTRIB(RELEASE, "Releases a lock", "", "")
DEF_ATTRIB(ACQUIRE, "Acquires a lock", "", "")
@@ -101,7 +104,9 @@ DEF_ATTRIB(ROPS_3, "Compound instruction worth 3 RISC-ops", "", "")
/* access to implicit registers */
DEF_ATTRIB(IMPLICIT_WRITES_LR, "Writes the link register", "", "UREG.LR")
DEF_ATTRIB(IMPLICIT_READS_PC, "Reads the program counter", "UREG.PC", "")
DEF_ATTRIB(IMPLICIT_WRITES_SP, "Writes the stack pointer", "", "UREG.SP")
DEF_ATTRIB(IMPLICIT_READS_SP, "Reads the stack pointer", "UREG.SP", "")
DEF_ATTRIB(IMPLICIT_WRITES_FP, "Writes the frame pointer", "", "UREG.FP")
DEF_ATTRIB(IMPLICIT_WRITES_LC0, "Writes loop count for loop 0", "", "UREG.LC0")
DEF_ATTRIB(IMPLICIT_WRITES_LC1, "Writes loop count for loop 1", "", "UREG.LC1")
@@ -111,13 +116,19 @@ DEF_ATTRIB(IMPLICIT_WRITES_P0, "Writes Predicate 0", "", "UREG.P0")
DEF_ATTRIB(IMPLICIT_WRITES_P1, "Writes Predicate 1", "", "UREG.P1")
DEF_ATTRIB(IMPLICIT_WRITES_P2, "Writes Predicate 1", "", "UREG.P2")
DEF_ATTRIB(IMPLICIT_WRITES_P3, "May write Predicate 3", "", "UREG.P3")
DEF_ATTRIB(IMPLICIT_READS_PC, "Reads the PC register", "", "")
DEF_ATTRIB(IMPLICIT_READS_P0, "Reads the P0 register", "", "")
DEF_ATTRIB(IMPLICIT_READS_P1, "Reads the P1 register", "", "")
DEF_ATTRIB(IMPLICIT_READS_P2, "Reads the P2 register", "", "")
DEF_ATTRIB(IMPLICIT_READS_P3, "Reads the P3 register", "", "")
DEF_ATTRIB(IMPLICIT_READS_P0, "Reads Predicate 0", "UREG.P0", "")
DEF_ATTRIB(IMPLICIT_READS_P1, "Reads Predicate 1", "UREG.P1", "")
DEF_ATTRIB(IMPLICIT_READS_P3, "Reads Predicate 3", "UREG.P3", "")
DEF_ATTRIB(IMPLICIT_WRITES_USR, "May write USR", "", "")
DEF_ATTRIB(IMPLICIT_READS_SP, "Reads the SP register", "", "")
DEF_ATTRIB(IMPLICIT_WRITES_CCR, "Writes CCR register", "", "UREG.CCR")
DEF_ATTRIB(IMPLICIT_WRITES_GOSP, "Writes GOSP register", "", "UREG.GOSP")
DEF_ATTRIB(IMPLICIT_WRITES_SSR, "Writes SSR register", "", "UREG.SSR")
DEF_ATTRIB(IMPLICIT_WRITES_SGP0, "Writes SGP0 register", "", "UREG.SGP0")
DEF_ATTRIB(IMPLICIT_WRITES_SGP1, "Writes SGP1 register", "", "UREG.SGP1")
DEF_ATTRIB(IMPLICIT_WRITES_IMASK_ANYTHREAD,
"Writes IMASK for any thread", "", "")
DEF_ATTRIB(IMPLICIT_WRITES_STID_PRIO_ANYTHREAD,
"Writes STID priority for any thread", "", "")
DEF_ATTRIB(COMMUTES, "The operation is communitive", "", "")
DEF_ATTRIB(DEALLOCRET, "dealloc_return", "", "")
DEF_ATTRIB(DEALLOCFRAME, "deallocframe", "", "")
@@ -137,9 +148,14 @@ DEF_ATTRIB(RESTRICT_SLOT3ONLY, "Must execute on slot3", "", "")
DEF_ATTRIB(RESTRICT_NOSLOT1, "No slot 1 instruction in parallel", "", "")
DEF_ATTRIB(RESTRICT_PREFERSLOT0, "Try to encode into slot 0", "", "")
DEF_ATTRIB(RESTRICT_PACKET_AXOK, "May exist with A-type or X-type", "", "")
DEF_ATTRIB(RESTRICT_SLOT1_AOK, "Slot 1 is allowed", "", "")
DEF_ATTRIB(ICOP, "Instruction cache op", "", "")
DEF_ATTRIB(EXCEPTION_SWI, "Software interrupt exception", "", "")
DEF_ATTRIB(DMA, "DMA instruction", "", "")
DEF_ATTRIB(NO_TIMING_LOG, "Does not get logged to the timing model", "", "")
DEF_ATTRIB(HWLOOP0_END, "Ends HW loop0", "", "")
DEF_ATTRIB(HWLOOP1_END, "Ends HW loop1", "", "")
DEF_ATTRIB(RET_TYPE, "return type", "", "")
@@ -151,6 +167,10 @@ DEF_ATTRIB(DCFETCH, "dcfetch type", "", "")
DEF_ATTRIB(L2FETCH, "Instruction is l2fetch type", "", "")
DEF_ATTRIB(DCTAGOP, "Data cache tag operation", "", "")
DEF_ATTRIB(ICTAGOP, "Instruction cache tag operation", "", "")
DEF_ATTRIB(L2TAGOP, "L2 cache tag operation", "", "")
DEF_ATTRIB(ICINVA, "icinva", "", "")
DEF_ATTRIB(DCCLEANINVA, "dccleaninva", "", "")
@@ -166,6 +186,9 @@ DEF_ATTRIB(NOTE_LATEPRED, "The predicate can not be used as a .new", "", "")
DEF_ATTRIB(NOTE_NVSLOT0, "Can execute only in slot 0 (ST)", "", "")
DEF_ATTRIB(NOTE_NOVP, "Cannot be paired with a HVX permute instruction", "", "")
DEF_ATTRIB(NOTE_VA_UNARY, "Combined with HVX ALU op (must be unary)", "", "")
DEF_ATTRIB(NOTE_SLOT1_AOK, "Slot 1 is allowed", "", "")
DEF_ATTRIB(NOTE_GUEST, "Guest mode instruction", "", "")
DEF_ATTRIB(NOTE_BADTAG_UNDEF, "Bad tag results in undefined behavior", "", "")
/* V6 MMVector Notes for Documentation */
DEF_ATTRIB(NOTE_SHIFT_RESOURCE, "Uses the HVX shift resource.", "", "")

482
target/hexagon/imported/macros.def Executable file → Normal file
View File

@@ -353,6 +353,12 @@ DEF_MACRO(
()
)
DEF_MACRO(
fREAD_SSR, /* read SSR register */
(READ_RREG(REG_SSR)), /* behavior */
()
)
DEF_MACRO(
fWRITE_LR, /* write lr */
WRITE_RREG(REG_LR,A), /* behavior */
@@ -371,12 +377,36 @@ DEF_MACRO(
(A_IMPLICIT_WRITES_SP)
)
DEF_MACRO(
fWRITE_GOSP, /* write gosp */
WRITE_RREG(REG_GOSP,A), /* behavior */
(A_IMPLICIT_WRITES_GOSP)
)
DEF_MACRO(
fREAD_SP, /* read stack pointer */
(READ_RREG(REG_SP)), /* behavior */
()
)
DEF_MACRO(
fREAD_GOSP, /* read guest other stack pointer */
(READ_RREG(REG_GOSP)), /* behavior */
()
)
DEF_MACRO(
fREAD_GELR, /* read guest other stack pointer */
(READ_RREG(REG_GELR)), /* behavior */
()
)
DEF_MACRO(
fREAD_GEVB, /* read guest other stack pointer */
(READ_RREG(REG_GEVB)), /* behavior */
()
)
DEF_MACRO(
fREAD_CSREG, /* read CS register */
(READ_RREG(REG_CSA+N)), /* behavior */
@@ -570,6 +600,11 @@ DEF_MACRO(
WRITE_PREG(3,VAL), /* behavior */
(A_IMPLICIT_WRITES_P3)
)
DEF_MACRO(
fWRITE_P3_LATE, /* write Predicate 0 */
{WRITE_PREG(3,VAL); fHIDE(MARK_LATE_PRED_WRITE(3))} , /* behavior */
(A_IMPLICIT_WRITES_P3,A_RESTRICT_LATEPRED)
)
DEF_MACRO(
fPART1, /* write Predicate 0 */
@@ -660,6 +695,7 @@ DEF_MACRO(
((size8s_t)((size2s_t)(A))),
/* optional attributes */
)
DEF_MACRO(
fCAST2_8u, /* macro name */
((size8u_t)((size2u_t)(A))),
@@ -1532,18 +1568,137 @@ DEF_MACRO(fECHO,
/* OS interface and stop/wait */
/********************************************/
DEF_MACRO(RUNNABLE_THREADS_MAX,
/* */,
()
)
DEF_MACRO(THREAD_IS_ON,
((PROC->arch_proc_options->thread_enable_mask>>TNUM) & 0x1),
()
)
DEF_MACRO(THREAD_EN_MASK,
((PROC->arch_proc_options->thread_enable_mask)),
()
)
DEF_MACRO(READ_IMASK,
/* */,
()
)
DEF_MACRO(WRITE_IMASK,
/* */,
(A_IMPLICIT_WRITES_IMASK_ANYTHREAD)
)
DEF_MACRO(WRITE_PRIO,
/* */,
(A_IMPLICIT_WRITES_STID_PRIO_ANYTHREAD)
)
DEF_MACRO(DO_IASSIGNW,
/* */,
(A_IMPLICIT_WRITES_IMASK_ANYTHREAD)
)
DEF_MACRO(fDO_NMI,
/* */,
)
DEF_MACRO(fDO_TRACE,
/* */,
)
DEF_MACRO(DO_IASSIGNR,
/* */,
()
)
DEF_MACRO(DO_SWI,
/* */,
(A_EXCEPTION_SWI)
)
DEF_MACRO(DO_CSWI,
LOG_GLOBAL_REG_WRITE(REG_IPEND,GLOBAL_REG_READ(REG_IPEND) & ~((REG) & GLOBAL_REG_READ(REG_IEL)));,
()
)
DEF_MACRO(DO_CIAD,
sys_ciad(thread,VAL); LOG_GLOBAL_REG_WRITE(REG_IAD,GLOBAL_REG_READ(REG_IAD) & ~(VAL));,
(A_EXCEPTION_SWI)
)
DEF_MACRO(DO_SIAD,
sys_siad(thread,VAL); LOG_GLOBAL_REG_WRITE(REG_IAD,GLOBAL_REG_READ(REG_IAD) | (VAL));,
(A_EXCEPTION_SWI)
)
DEF_MACRO(fBREAK,
/* */,
()
)
DEF_MACRO(fPAUSE,
{sys_pause(thread, insn->slot, IMM);},
()
)
DEF_MACRO(fTRAP,
warn("Trap NPC=%x ",fREAD_NPC());
warn("Trap exception, PCYCLE=%lld TYPE=%d NPC=%x IMM=0x%x",thread->processor_ptr->pstats[pcycles],TRAPTYPE,fREAD_NPC(),IMM);
register_trap_exception(thread,fREAD_NPC(),TRAPTYPE,IMM);,
/* */,
(A_EXCEPTION_SWI)
)
DEF_MACRO(fCLEAR_RTE_EX,
/* */,
()
)
DEF_MACRO(fTLB_LOCK_AVAILABLE,
(fREAD_GLOBAL_REG_FIELD(SYSCONF,SYSCFG_TLBLOCK) == 0),
()
)
DEF_MACRO(fK0_LOCK_AVAILABLE,
(fREAD_GLOBAL_REG_FIELD(SYSCONF,SYSCFG_K0LOCK) == 0),
()
)
DEF_MACRO(fSET_TLB_LOCK,
{
if (fTLB_LOCK_AVAILABLE()) {
fLOG_GLOBAL_REG_FIELD(SYSCONF,SYSCFG_TLBLOCK,1);
} else {
sys_waiting_for_tlb_lock(thread);
}
},
()
)
DEF_MACRO(fSET_K0_LOCK,
/* */,
()
)
DEF_MACRO(fCLEAR_TLB_LOCK,
/* */,
()
)
DEF_MACRO(fCLEAR_K0_LOCK,
/* */,
()
)
DEF_MACRO(fALIGN_REG_FIELD_VALUE,
((VAL)<<reg_field_info[FIELD].offset),
/* */
@@ -1554,6 +1709,24 @@ DEF_MACRO(fGET_REG_FIELD_MASK,
/* */
)
DEF_MACRO(fLOG_REG_FIELD,
LOG_MASKED_REG_WRITE(thread,REG_##REG,
fALIGN_REG_FIELD_VALUE(FIELD,VAL),
fGET_REG_FIELD_MASK(FIELD)),
()
)
DEF_MACRO(fWRITE_GLOBAL_REG_FIELD,
/* */,
)
DEF_MACRO(fLOG_GLOBAL_REG_FIELD,
LOG_MASKED_GLOBAL_REG_WRITE(REG_##REG,
fALIGN_REG_FIELD_VALUE(FIELD,VAL),
fGET_REG_FIELD_MASK(FIELD)),
()
)
DEF_MACRO(fREAD_REG_FIELD,
fEXTRACTU_BITS(thread->Regs[REG_##REG],
reg_field_info[FIELD].width,
@@ -1561,6 +1734,11 @@ DEF_MACRO(fREAD_REG_FIELD,
/* ATTRIBS */
)
DEF_MACRO(fREAD_GLOBAL_REG_FIELD,
/* */,
/* ATTRIBS */
)
DEF_MACRO(fGET_FIELD,
fEXTRACTU_BITS(VAL,
reg_field_info[FIELD].width,
@@ -1576,6 +1754,174 @@ DEF_MACRO(fSET_FIELD,
/* ATTRIBS */
)
DEF_MACRO(fSET_RUN_MODE_NOW,
/* */,
)
DEF_MACRO(fIN_DEBUG_MODE,
(thread->debug_mode || (fREAD_GLOBAL_REG_FIELD(ISDBST,ISDBST_DEBUGMODE) & 1<<TNUM)),
()
)
DEF_MACRO(fIN_DEBUG_MODE_NO_ISDB,
(thread->debug_mode),
()
)
DEF_MACRO(fIN_DEBUG_MODE_WARN,
{
if (fREAD_GLOBAL_REG_FIELD(ISDBST,ISDBST_DEBUGMODE) & 1<<TNUM)
warn("In ISDB debug mode, but TB told me to step normally");
},
()
)
DEF_MACRO(fCLEAR_RUN_MODE,
{fLOG_GLOBAL_REG_FIELD(MODECTL,MODECTL_E,
fREAD_GLOBAL_REG_FIELD(MODECTL,MODECTL_E) & ~(1<<(TNUM)))},
/* NOTHING */
)
DEF_MACRO(fCLEAR_RUN_MODE_NOW,
/* */,
/* NOTHING */
)
DEF_MACRO(fGET_RUN_MODE,
/* */,
)
DEF_MACRO(fSET_WAIT_MODE,
{fLOG_GLOBAL_REG_FIELD(MODECTL,MODECTL_W,
fREAD_GLOBAL_REG_FIELD(MODECTL,MODECTL_W) | 1<<(TNUM))},
/* NOTHING */
)
DEF_MACRO(fCLEAR_WAIT_MODE,
/* */,
)
DEF_MACRO(fGET_WAIT_MODE,
/* */,
)
DEF_MACRO(fRESET_THREAD,
register_reset_interrupt(T,NUM),
)
DEF_MACRO(fREAD_CURRENT_EVB,
(GLOBAL_REG_READ(REG_EVB)),
/* nothing */
)
DEF_MACRO(fREAD_ELR,
READ_RREG(REG_ELR),
()
)
DEF_MACRO(fPOW2_HELP_ROUNDUP,
((VAL) | ((VAL) >> 1) | ((VAL) >> 2) | ((VAL) >> 4) | ((VAL) >> 8) | ((VAL) >> 16)),
()
)
DEF_MACRO(fPOW2_ROUNDUP,
fPOW2_HELP_ROUNDUP((VAL)-1)+1,
()
)
DEF_MACRO(fTLB_IDXMASK,
/* */,
()
)
DEF_MACRO(fTLB_NONPOW2WRAP,
/* */,
/* ATTRIBS */
)
DEF_MACRO(fTLBW,
/* */,
/* ATTRIBS */
)
DEF_MACRO(fTLB_ENTRY_OVERLAP,
fHIDE( (sys_check_overlap(thread,VALUE)!=-2) ),
/* ATTRIBS */
)
DEF_MACRO(fTLB_ENTRY_OVERLAP_IDX,
fHIDE(sys_check_overlap(thread,VALUE)),
/* ATTRIBS */
)
DEF_MACRO(fTLBR,
TLB_REG_READ(fTLB_NONPOW2WRAP(fTLB_IDXMASK(INDEX))),
/* ATTRIBS */
)
DEF_MACRO(fTLBP,
tlb_lookup(thread,((TLBHI)>>12),((TLBHI)<<12),1),
/* attribs */
)
DEF_MACRO(READ_SGP0,
READ_RREG(REG_SGP),
()
)
DEF_MACRO(READ_SGP1,
READ_RREG(REG_SGP+1),
()
)
DEF_MACRO(READ_SGP10,
READ_RREG_PAIR(REG_SGP),
()
)
DEF_MACRO(READ_UGP,
READ_RREG(REG_UGP),
)
DEF_MACRO(WRITE_SGP0,
WRITE_RREG(REG_SGP,VAL),
(A_IMPLICIT_WRITES_SGP0)
)
DEF_MACRO(WRITE_SGP1,
WRITE_RREG(REG_SGP+1,VAL),
(A_IMPLICIT_WRITES_SGP1)
)
DEF_MACRO(WRITE_SGP10,
WRITE_RREG_PAIR(REG_SGP,VAL),
(A_IMPLICIT_WRITES_SGP0,A_IMPLICIT_WRITES_SGP1)
)
DEF_MACRO(WRITE_UGP,
WRITE_RREG(REG_UGP,VAL),
)
DEF_MACRO(fSTART,
/* */,
()
)
DEF_MACRO(fRESUME,
fLOG_GLOBAL_REG_FIELD(MODECTL,MODECTL_W,
fREAD_GLOBAL_REG_FIELD(MODECTL,MODECTL_W) & (~(REG))),
()
)
DEF_MACRO(fGET_TNUM,
thread->threadId,
()
)
/********************************************/
/* Cache Management */
/********************************************/
@@ -1602,19 +1948,49 @@ DEF_MACRO(fISYNC,
)
DEF_MACRO(fICFETCH,
,
()
)
DEF_MACRO(fDCFETCH,
sys_dcfetch(thread, (REG), insn->slot),
(A_MEMLIKE)
)
DEF_MACRO(fICINVA,
{
arch_internal_flush(thread->processor_ptr, 0, 0xffffffff);
sys_icinva(thread, (REG),insn->slot);
},
/* */,
(A_ICINVA)
)
DEF_MACRO(fDCTAGR,
({DST=sys_dctagr(thread, INDEX, insn->slot,DSTREGNO);})/* FIXME */,
()
)
DEF_MACRO(fDCTAGW,
(sys_dctagw(thread, INDEX, PART2, insn->slot)),
()
)
DEF_MACRO(fICTAGR,
({DST=sys_ictagr(thread, INDEX, insn->slot,REGNO);}),
()
)
DEF_MACRO(fICDATAR,
({DST=sys_icdatar(thread, INDEX, insn->slot);}),
()
)
DEF_MACRO(fICTAGW,
(sys_ictagw(thread, INDEX, PART2, insn->slot)),
()
)
DEF_MACRO(fICDATAW,
({ fHIDE(); }),
()
)
DEF_MACRO(fL2FETCH,
sys_l2fetch(thread, ADDR,HEIGHT,WIDTH,STRIDE,FLAGS, insn->slot),
(A_MEMLIKE,A_L2FETCH)
@@ -1635,6 +2011,12 @@ DEF_MACRO(fDCZEROA,
(A_MEMLIKE)
)
DEF_MACRO(fDCINVA,
sys_dcinva(thread, (REG)),
(A_MEMLIKE)
)
DEF_MACRO(fCHECKFORPRIV,
{sys_check_privs(thread); if (EXCEPTION_DETECTED) return; },
()
@@ -1645,6 +2027,16 @@ DEF_MACRO(fCHECKFORGUEST,
()
)
DEF_MACRO(fTAKEN_INTERRUPT_EDGECLEAR,
{ proc->global_regs[REG_IPEND] &= ~(INT_NUMTOMASK(intnum) & proc->global_regs[REG_IEL]); },
()
)
DEF_MACRO(fSET_IAD,
/* */,
()
)
DEF_MACRO(fBRANCH_SPECULATE_STALL,
{
sys_speculate_branch_stall(thread, insn->slot, JUMP_COND(JUMP_PRED_SET),
@@ -1664,3 +2056,79 @@ DEF_MACRO(IV1DEAD,
,
()
)
DEF_MACRO(fIN_MONITOR_MODE,
sys_in_monitor_mode(thread),
()
)
DEF_MACRO(fIN_USER_MODE,
sys_in_user_mode(thread),
()
)
DEF_MACRO(fIN_GUEST_MODE,
sys_in_guest_mode(thread),
()
)
DEF_MACRO(fGRE_ENABLED,
fREAD_REG_FIELD(CCR,CCR_GRE),
()
)
DEF_MACRO(fGTE_ENABLED,
fREAD_REG_FIELD(CCR,CCR_GRE),
()
)
DEF_MACRO(fTRAP1_VIRTINSN,
((fIN_GUEST_MODE())
&& (fGRE_ENABLED())
&& ( ((IMM) == 1)
|| ((IMM) == 3)
|| ((IMM) == 4)
|| ((IMM) == 6))),
()
)
DEF_MACRO(fVIRTINSN_RTE,
do {
thread->trap1_info = TRAP1_VIRTINSN_RTE;
fLOG_REG_FIELD(SSR,SSR_SS,fREAD_REG_FIELD(GSR,GSR_SS));
fLOG_REG_FIELD(CCR,CCR_GIE,fREAD_REG_FIELD(GSR,GSR_IE));
fLOG_REG_FIELD(SSR,SSR_GM,!fREAD_REG_FIELD(GSR,GSR_UM));
fBRANCH((fREAD_GELR() & -4),COF_TYPE_RTE);
fINTERNAL_CLEAR_SAMEPAGE();
} while (0),
(A_IMPLICIT_WRITES_CCR,A_IMPLICIT_WRITES_SSR)
)
DEF_MACRO(fVIRTINSN_SETIE,
do {
fLOG_REG_FIELD(CCR,CCR_GIE,(REG) & 1);
REG = fREAD_REG_FIELD(CCR,CCR_GIE);
thread->trap1_info = TRAP1_VIRTINSN_SETIE;
} while (0),
(A_IMPLICIT_WRITES_CCR)
)
DEF_MACRO(fVIRTINSN_GETIE,
{
thread->trap1_info = TRAP1_VIRTINSN_GETIE;
REG = fREAD_REG_FIELD(CCR,CCR_GIE);
},
()
)
DEF_MACRO(fVIRTINSN_SPSWAP,
do {
if (fREAD_REG_FIELD(GSR,GSR_UM)) {
size4u_t TEMP = REG;
REG = fREAD_GOSP();
fWRITE_GOSP(TEMP);
thread->trap1_info = TRAP1_VIRTINSN_SPSWAP;
}
} while (0),
(A_IMPLICIT_WRITES_GOSP)
)