hw/arm/smmuv3-accel: Change "oas" property type to OasMode

Change accel SMMUv3 OAS property from uint8_t to OasMode. The
'auto' value is not implemented, as this commit is meant to
set the property to the correct type and avoid breaking JSON/QMP
when the auto mode is introduced. A future patch will implement
resolution of 'auto' value to match the host SMMUv3 OAS value.

The conversion of the "oas" property type to OnOffAuto is an
incompatible change for JSON/QMP when a uint8_t value is expected for
"oas", but this property is new in 11.0 and this patch is
submitted as a fix to the property type.

Fixes: a015ac990f ("hw/arm/smmuv3-accel: Add property to specify OAS bits")
Tested-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Shameer Kolothum <skolothumtho@nvidia.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Message-id: 20260323182454.1416110-8-nathanc@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Nathan Chen
2026-03-24 14:02:30 +00:00
committed by Peter Maydell
parent d3d2de3d22
commit c2ff1305cc
4 changed files with 11 additions and 12 deletions

View File

@@ -850,7 +850,7 @@ void smmuv3_accel_idr_override(SMMUv3State *s)
}
/* Advertise 48-bit OAS in IDR5 when requested (default is 44 bits). */
if (s->oas == SMMU_OAS_48BIT) {
if (s->oas == OAS_MODE_48) {
s->idr[5] = FIELD_DP32(s->idr[5], IDR5, OAS, SMMU_IDR5_OAS_48);
}

View File

@@ -1984,6 +1984,11 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "ssidsize auto mode is not supported");
return false;
}
if (s->oas != OAS_MODE_44 && s->oas != OAS_MODE_48) {
error_setg(errp, "QEMU SMMUv3 model only implements 44 and 48 bit"
"OAS; other OasMode values are not supported");
return false;
}
if (!s->accel) {
if (s->ril == ON_OFF_AUTO_OFF) {
@@ -1994,7 +1999,7 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
error_setg(errp, "ats can only be enabled if accel=on");
return false;
}
if (s->oas != SMMU_OAS_44BIT) {
if (s->oas > OAS_MODE_44) {
error_setg(errp, "OAS must be 44 bits when accel=off");
return false;
}
@@ -2012,11 +2017,6 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp)
return false;
}
if (s->oas != SMMU_OAS_44BIT && s->oas != SMMU_OAS_48BIT) {
error_setg(errp, "OAS can only be set to 44 or 48 bits");
return false;
}
return true;
}
@@ -2143,7 +2143,7 @@ static const Property smmuv3_properties[] = {
/* RIL can be turned off for accel cases */
DEFINE_PROP_ON_OFF_AUTO("ril", SMMUv3State, ril, ON_OFF_AUTO_ON),
DEFINE_PROP_ON_OFF_AUTO("ats", SMMUv3State, ats, ON_OFF_AUTO_OFF),
DEFINE_PROP_UINT8("oas", SMMUv3State, oas, 44),
DEFINE_PROP_OAS_MODE("oas", SMMUv3State, oas, OAS_MODE_44),
DEFINE_PROP_SSIDSIZE_MODE("ssidsize", SMMUv3State, ssidsize,
SSID_SIZE_MODE_0),
};
@@ -2180,7 +2180,8 @@ static void smmuv3_class_init(ObjectClass *klass, const void *data)
"supported.");
object_class_property_set_description(klass, "oas",
"Specify Output Address Size (for accel=on). Supported values "
"are 44 or 48 bits. Defaults to 44 bits");
"are 44 or 48 bits. Defaults to 44 bits. oas=auto is not "
"supported.");
object_class_property_set_description(klass, "ssidsize",
"Number of bits used to represent SubstreamIDs (SSIDs). "
"A value of N allows SSIDs in the range [0 .. 2^N - 1]. "

View File

@@ -342,8 +342,6 @@ REG32(IDR5, 0x14)
FIELD(IDR5, VAX, 10, 2);
FIELD(IDR5, STALL_MAX, 16, 16);
#define SMMU_OAS_44BIT 44
#define SMMU_OAS_48BIT 48
#define SMMU_IDR5_OAS_44 4
#define SMMU_IDR5_OAS_48 5

View File

@@ -72,7 +72,7 @@ struct SMMUv3State {
Error *migration_blocker;
OnOffAuto ril;
OnOffAuto ats;
uint8_t oas;
OasMode oas;
SsidSizeMode ssidsize;
};