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accel/mshv: implement cpu_thread_is_idle() hook
In MSHV the hypervisor APIC is always used, so we to implement this hook to make sure the AP's vcpu thread is not blocked waiting for an INIT SIPI by the BSP. Without this change soft reboots with -smp cpus>=2 will hang. Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Link: https://lore.kernel.org/r/20260421-mshv_accel_arm64_supp-v3-9-469f544778ba@linux.microsoft.com [Make comment not x86 specific. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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committed by
Paolo Bonzini
parent
153dc2fa7b
commit
dbfb680772
@@ -714,11 +714,23 @@ static const TypeInfo mshv_accel_type = {
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.instance_size = sizeof(MshvState),
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};
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/*
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* MSHV manages secondary processors in the hypervisor. SIPI for x86 and
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* PSCI for Arm are handled internally. Halted vCPUs must still enter
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* mshv_cpu_exec() so that MSHV_RUN_VP is called and the hypervisor will
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* wake APs.
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*/
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static bool mshv_vcpu_thread_is_idle(CPUState *cpu)
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{
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return false;
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}
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static void mshv_accel_ops_class_init(ObjectClass *oc, const void *data)
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{
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AccelOpsClass *ops = ACCEL_OPS_CLASS(oc);
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ops->create_vcpu_thread = mshv_start_vcpu_thread;
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ops->cpu_thread_is_idle = mshv_vcpu_thread_is_idle;
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ops->synchronize_post_init = mshv_cpu_synchronize_post_init;
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ops->synchronize_post_reset = mshv_cpu_synchronize_post_reset;
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ops->synchronize_state = mshv_cpu_synchronize;
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