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target/hexagon: Add PC to raise_exception, use fTRAP() helper

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Add PC to raise_exception helper

Replace the fGEN_TCG_J2_trap0 macro override with the fTRAP()-generated
system helper instead.

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
This commit is contained in:
Brian Cain
2026-06-22 15:28:51 -07:00
committed by Brian Cain
parent 1b8ec45484
commit eebc376773
4 changed files with 21 additions and 19 deletions
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7
target/hexagon/gen_tcg.h
View File

@@ -1349,13 +1349,6 @@
#define fGEN_TCG_S2_storew_rl_st_vi(SHORTCODE) SHORTCODE
#define fGEN_TCG_S4_stored_rl_st_vi(SHORTCODE) SHORTCODE
#define fGEN_TCG_J2_trap0(SHORTCODE) \
do { \
uiV = uiV; \
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt.pc); \
TCGv excp = tcg_constant_tl(HEX_EVENT_TRAP0); \
gen_helper_raise_exception(tcg_env, excp); \
} while (0)
#endif
#define fGEN_TCG_A2_nop(SHORTCODE) do { } while (0)

2
target/hexagon/helper.h
View File

@@ -18,7 +18,7 @@
#include "internal.h"
#include "helper_protos_generated.h.inc"
DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32)
DEF_HELPER_FLAGS_3(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32, i32)
DEF_HELPER_2(commit_store, void, env, int)
DEF_HELPER_3(gather_store, void, env, i32, int)
DEF_HELPER_1(commit_hvx_stores, void, env)

10
target/hexagon/op_helper.c
View File

@@ -66,15 +66,13 @@ G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env,
uint32_t exception,
uintptr_t pc)
{
CPUState *cs = env_cpu(env);
qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
cs->exception_index = exception;
cpu_loop_exit_restore(cs, pc);
do_raise_exception(env, exception, pc, 0);
}
G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp)
G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp,
uint32_t PC)
{
hexagon_raise_exception_err(env, excp, 0);
hexagon_raise_exception_err(env, excp, PC);
}
void log_store32(CPUHexagonState *env, target_ulong addr,

21
target/hexagon/translate.c
View File

@@ -126,12 +126,19 @@ intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regnum,
return offset;
}
static void gen_exception_raw(int excp)
static void gen_exception(int excp, uint32_t PC)
{
gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp));
gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp),
tcg_constant_i32(PC));
}
#ifndef CONFIG_USER_ONLY
static inline void gen_precise_exception(int excp, uint32_t PC)
{
tcg_gen_movi_i32(hex_cause_code, excp);
gen_exception(HEX_EVENT_PRECISE, PC);
}
static void gen_pcycle_counters(DisasContext *ctx)
{
if (ctx->pcycle_enabled) {
@@ -140,6 +147,7 @@ static void gen_pcycle_counters(DisasContext *ctx)
}
#endif
static void gen_exec_counters(DisasContext *ctx)
{
tcg_gen_addi_tl(hex_gpr[HEX_REG_QEMU_PKT_CNT],
@@ -211,8 +219,11 @@ static void gen_end_tb(DisasContext *ctx)
void hex_gen_exception_end_tb(DisasContext *ctx, int excp)
{
gen_exec_counters(ctx);
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);
gen_exception_raw(excp);
#ifdef CONFIG_USER_ONLY
gen_exception(excp, ctx->pkt.pc);
#else
gen_precise_exception(excp, ctx->pkt.pc);
#endif
ctx->base.is_jmp = DISAS_NORETURN;
}
@@ -226,7 +237,7 @@ static void gen_exception_decode_fail(DisasContext *ctx, int nwords, int excp)
gen_exec_counters(ctx);
tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], fail_pc);
gen_exception_raw(excp);
gen_exception(excp, fail_pc);
ctx->base.is_jmp = DISAS_NORETURN;
ctx->base.pc_next = fail_pc;
}