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accel/tcg: Remove non-explicit endian cpu_ld*_code() wrappers
All uses were converted to the cpu_ld*_code_mmu() helpers: remove them. Update the documentation. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260320074555.33974-3-philmd@linaro.org>
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@@ -235,16 +235,13 @@ Regexes for git grep:
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- ``\<cpu_ld[us]\?[bwlq]\(_[bl]e\)\?_data\>``
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- ``\<cpu_st[bwlq]\(_[bl]e\)\?_data\+\>``
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``cpu_ld*_code``
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~~~~~~~~~~~~~~~~
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``cpu_ld*_code_mmu``
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~~~~~~~~~~~~~~~~~~~~
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These functions perform a read for instruction execution. The ``mmuidx``
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parameter is taken from the current mode of the guest CPU, as determined
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by ``cpu_mmu_index(env, true)``. The ``retaddr`` parameter is 0, and
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thus does not unwind guest CPU state, because CPU state is always
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synchronized while translating instructions. Any guest CPU exception
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that is raised will indicate an instruction execution fault rather than
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a data read fault.
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These functions work like the ``cpu_{ld,st}*_mmu`` functions
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except that they perform a read for instruction execution.
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Any guest CPU exception that is raised will indicate an instruction
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execution fault rather than a data read fault.
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In general these functions should not be used directly during translation.
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There are wrapper functions that are to be used which also take care of
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@@ -252,7 +249,7 @@ plugins for tracing.
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Function names follow the pattern:
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load: ``cpu_ld{sign}{size}_code(env, ptr)``
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load: ``cpu_ld{sign}{size}_code_mmu(env, addr, oi, retaddr)``
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``sign``
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- (empty) : for 32 or 64 bit sizes
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@@ -266,12 +263,12 @@ load: ``cpu_ld{sign}{size}_code(env, ptr)``
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- ``q`` : 64 bits
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Regexes for git grep:
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- ``\<cpu_ld[us]\?[bwlq]_code\>``
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- ``\<cpu_ld[us]\?[bwlq]_code_mmu\>``
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``translator_ld*``
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~~~~~~~~~~~~~~~~~~
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These functions are a wrapper for ``cpu_ld*_code`` which also perform
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These functions are a wrapper for ``cpu_ld*_code_mmu`` which also perform
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any actions required by any tracing plugins. They are only to be
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called during the translator callback ``translate_insn``.
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@@ -51,10 +51,9 @@
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* _be: for forced big endian
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* _le: for forced little endian
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*
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* mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx".
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* mmusuffix is one of the generic suffixes "data" or "mmuidx".
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* The "mmuidx" suffix carries an extra mmu_idx argument that specifies
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* the index to use; the "data" and "code" suffixes take the index from
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* cpu_mmu_index().
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* the index to use; the "data" suffix take the index from cpu_mmu_index().
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*
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* The "mmu" suffix carries the full MemOpIdx, with both mmu_idx and the
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* MemOp including alignment requirements. The alignment will be enforced.
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@@ -470,34 +469,6 @@ cpu_stq_le_data(CPUArchState *env, abi_ptr addr, uint64_t val)
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# define cpu_stl_mmuidx_ra cpu_stl_le_mmuidx_ra
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# define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra
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#endif
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static inline uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr)
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{
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CPUState *cs = env_cpu(env);
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MemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(cs, true));
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return cpu_ldb_code_mmu(env, addr, oi, 0);
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}
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static inline uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr)
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{
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CPUState *cs = env_cpu(env);
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MemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(cs, true));
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return cpu_ldw_code_mmu(env, addr, oi, 0);
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}
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static inline uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr)
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{
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CPUState *cs = env_cpu(env);
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MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true));
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return cpu_ldl_code_mmu(env, addr, oi, 0);
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}
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static inline uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr)
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{
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CPUState *cs = env_cpu(env);
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MemOpIdx oi = make_memop_idx(MO_TEUQ, cpu_mmu_index(cs, true));
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return cpu_ldq_code_mmu(env, addr, oi, 0);
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}
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#endif /* TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API */
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#endif /* ACCEL_TCG_CPU_LDST_H */
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