Anton Johansson
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a045f6a8e8
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hw/riscv: Register generic riscv[32|64] QOM interfaces
Defines generic 32- and 64-bit riscv machine interfaces for machines to
implement.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20260520-hw-riscv-cpu-int-v3-1-d1123ea63d9c@rev.ng>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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2026-05-27 08:03:27 +02:00 |
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