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Philippe Mathieu-Daudé
ace0b0b3d1 tests/docker: Add the mips32r6el toolchain on Debian cross container 
Use mipsisa32r6el-linux-gnu-gcc for the little-endian MIPS32R6
tests and install its compiler and libc development packages in
the shared Debian cross image.

Suggested-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030182546.2508-2-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
f2ad736f63 tests/tcg/mips: Add MSA load/store tests 
Add coverage for the MSA LD/ST.B/H/W/D instructions at every source
and destination byte offset within a vector-sized block, including
accesses that cross a page boundary. Verify per-element endian
ordering, destination contents, and source register preservation.

Test both little-endian (P5600, MIPS32R5) and big-endian
(I6400, MIPS64R6).

AI-used-for: tests
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
  ERROR: use qemu_real_host_page_size() instead of sysconf(_SC_PAGESIZE)
  #138: FILE: tests/tcg/mips/test_msa_load_store.c:110:
  +    long page_size = sysconf(_SC_PAGESIZE);
Message-ID: <20261030175357.99684-33-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
aaa3bed0c2 tests/tcg/mips: Group MSA shift tests 
Build the 20 per-opcode shift tests as a single executable,
test_msa_shift.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

All MSA tests now emit TAP: select it in the meson setup.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-32-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
095b9ee9d1 tests/tcg/mips: Group MSA pack tests 
Build the 12 per-opcode pack tests as a single executable,
test_msa_pack.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-31-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
83623b7aeb tests/tcg/mips: Group MSA logic tests 
Build the 5 per-opcode logic tests as a single executable,
test_msa_logic.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-30-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
03311a4b37 tests/tcg/mips: Group MSA interleave tests 
Build the 16 per-opcode interleave tests as a single executable,
test_msa_interleave.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-29-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
553b96ced5 tests/tcg/mips: Group MSA int-subtract tests 
Build the 34 per-opcode int-subtract tests as a single executable,
test_msa_int_subtract.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-28-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
d9361faa54 tests/tcg/mips: Group MSA int-multiply tests 
Build the 12 per-opcode int-multiply tests as a single executable,
test_msa_int_multiply.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-27-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
7959d02972 tests/tcg/mips: Group MSA int-max-min tests 
Build the 24 per-opcode int-max-min tests as a single executable,
test_msa_int_max_min.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-26-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
5715c8250e tests/tcg/mips: Group MSA int-dot-product tests 
Build the 18 per-opcode int-dot-product tests as a single executable,
test_msa_int_dot_product.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-25-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
5e6e5bc1fa tests/tcg/mips: Group MSA int-div-mod tests 
Build the 16 per-opcode int-div-mod tests as a single executable,
test_msa_int_div_mod.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-24-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
a9c9d84079 tests/tcg/mips: Group MSA int-compare tests 
Build the 20 per-opcode int-compare tests as a single executable,
test_msa_int_compare.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-23-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
f52a9a4c68 tests/tcg/mips: Group MSA int-average tests 
Build the 16 per-opcode int-average tests as a single executable,
test_msa_int_average.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-22-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
00b3e64fae tests/tcg/mips: Group MSA int-add tests 
Build the 26 per-opcode int-add tests as a single executable,
test_msa_int_add.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-21-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
2a15fd32be tests/tcg/mips: Group MSA float-max-min tests 
Build the 8 per-opcode float-max-min tests as a single executable,
test_msa_float_max_min.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-20-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
6c47904043 tests/tcg/mips: Group MSA fixed-multiply tests 
Build the 12 per-opcode fixed-multiply tests as a single executable,
test_msa_fixed_multiply.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-19-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
841106f263 tests/tcg/mips: Group MSA bit-set tests 
Build the 12 per-opcode bit-set tests as a single executable,
test_msa_bit_set.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-18-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
e364bb625f tests/tcg/mips: Group MSA bit-move tests 
Build the 11 per-opcode bit-move tests as a single executable,
test_msa_bit_move.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-17-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
1410403c82 tests/tcg/mips: Group MSA bit-count tests 
Build the 12 per-opcode bit-count tests as a single executable,
test_msa_bit_count.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Prefix the per-instruction summary of test_utils_128.h with '# '
so TAP parsers treat it as a comment.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-16-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
b6718e3d22 tests/tcg/mips: Group Release 6 shift tests 
Build the 6 per-opcode shift tests as a single executable,
test_mips64r6_shift.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

All Release 6 tests now emit TAP: select it in the meson setup.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-15-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
36d43113b6 tests/tcg/mips: Group Release 6 multiply tests 
Build the 8 per-opcode multiply tests as a single executable,
test_mips64r6_multiply.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-14-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
b96ec49e81 tests/tcg/mips: Group Release 6 logic tests 
Build the 4 per-opcode logic tests as a single executable,
test_mips64r6_logic.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-13-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
47ae50dd34 tests/tcg/mips: Group Release 6 crc tests 
Build the 8 per-opcode crc tests as a single executable,
test_mips64r6_crc.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-12-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
7743c517a6 tests/tcg/mips: Group Release 6 bitops tests 
Build the 6 per-opcode bitops tests as a single executable,
test_mips64r6_bitops.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Prefix the per-case output of test_utils_64.h with '# ' so TAP
parsers treat it as a comment.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-11-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
26f5b445c9 tests/tcg/mips: Group DSP shift tests 
Build the 22 per-opcode shift tests as a single executable,
test_dsp_shift.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

All DSP tests now emit TAP: select it in the meson setup.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-10-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
a29ccc2be6 tests/tcg/mips: Group DSP pack tests 
Build the 27 per-opcode pack tests as a single executable,
test_dsp_pack.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-9-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
386761a932 tests/tcg/mips: Group DSP mul tests 
Build the 10 per-opcode mul tests as a single executable,
test_dsp_mul.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-8-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
0d2f700331 tests/tcg/mips: Group DSP dot tests 
Build the 28 per-opcode dot tests as a single executable,
test_dsp_dot.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-7-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
f88b7bb864 tests/tcg/mips: Group DSP ctrl tests 
Build the 6 per-opcode ctrl tests as a single executable,
test_dsp_ctrl.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-6-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
9dad3e995a tests/tcg/mips: Group DSP cmp tests 
Build the 14 per-opcode cmp tests as a single executable,
test_dsp_cmp.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-5-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
667d36ce1b tests/tcg/mips: Group DSP arith tests 
Build the 33 per-opcode arith tests as a single executable,
test_dsp_arith.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-4-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
3ea3314a99 tests/tcg/mips: Group DSP acc tests 
Build the 19 per-opcode acc tests as a single executable,
test_dsp_acc.c, to reduce the number of test binaries.
Each opcode reports one TAP line.

Add test_dsp_runner.h: assert() only counts failures, and
RUN_TEST() resets DSPControl and reports each test in TAP.
Drop the unused hello-world test.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-3-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
aad5e8f9d6 tests/tcg/mips: Remove unused test_utils_32.h 
The 32-bit test utilities header added in 26b3256392 is not
included by any test, and check_results_32() is never called.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030175357.99684-2-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
38140f4428 tests/tcg/mips64: Test the Octeon POP instruction 
Check that POP counts the bits of the low 32 bits only, unlike DPOP.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030174856.98759-5-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
caf01b298a tests/tcg/mips64: Report Octeon test results with TAP 
Replace assert() by TAP_CHECK(): one TAP line per check, so a
failure no longer aborts the remaining ones. Call TAP_START()
and return tap_done() from main(). Select the TAP protocol in
the meson setup.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030174856.98759-4-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
7d8259677e tests/tcg: Allow tests to report results with TAP 
Add an optional 'protocol' setup entry, passed to meson's test().
The default stays 'exitcode'; skipped tests (exit 77) are forced
back to it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Message-ID: <20261030174856.98759-3-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
5fe62302dc tests/tcg: Add minimal TAP helper header 
Add a small header to report test results using the Test Anything
Protocol, which meson parses when the test declares the 'tap'
protocol:

 - TAP_START() prints the TAP version line.
 - tap_report() prints one numbered "ok" / "not ok" line, with a
   printf-style description.
 - TAP_CHECK() reports a condition, using its text as description.
 - tap_info() prints a printf-style diagnostic line prefixed with '# ',
   exposed as TAP_INFO(). It is not a test result: it neither prints a
   number nor counts towards the plan or the exit status.
 - tap_assert() is a non-fatal assert: it prints a '# FAIL' TAP
   diagnostic (via TAP_INFO()) and counts the failure in
   tap_assert_failures, for tests grouping several asserts into a
   single reported result.
 - tap_done() prints the plan and returns the exit status for main().

The counters are static, so each test must be a single translation
unit.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261030174856.98759-2-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
e0e8a85f26 accel/tcg: Remove non-explicit endian cpu_ld/st*_data*() helpers 
All uses were converted to the explicit cpu_ld/st*_{be,le}_data*()
helpers, no need for the non-explicit versions anymore.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261029151317.19170-7-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
1f7fe57fce target/mips: Convert MSA LD/ST.D (Doubleword Vector) 
Replace runtime helpers by translation.
BE LD.D/ST.D now uses MO_BE with exchanged half handles;
no explicit D swaps or store-copy temporaries.

Replace the legacy cpu_ld/st*_data_ra() calls by tcg_gen_qemu_ld/st()
which allow to respect atomicity.

Remove the ensure_writable_pages() hack and MSALDST_PROTO macro.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261029151317.19170-6-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
a19240bdf0 target/mips: Convert MSA LD/ST.W (Word Vector) 
Replace runtime helpers by translation.

Replace the legacy cpu_ld/st*_data_ra() calls by
tcg_gen_qemu_ld/st() which allow to respect atomicity.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261029151317.19170-5-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
4e33820ed6 target/mips: Convert MSA LD/ST.H (Halfword Vector) 
Replace runtime helpers by translation.

Replace the legacy cpu_ld/st*_data_ra() calls by
tcg_gen_qemu_ld/st() which allow to respect atomicity.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261029151317.19170-4-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
735c3ff272 target/mips: Convert MSA LD/ST.B (Byte Vector) 
Replace runtime helpers by translation.

Replace the legacy cpu_ld/st*_data_ra() calls by
tcg_gen_qemu_ld/st() which allow to respect atomicity.

Consider the host endianness.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261029151317.19170-3-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
dfa162309c target/mips: Expand TRANS_DF_iv() macro for MSA Load/Store 
In order to ease the conversion of MSA Load/Store runtime
helpers to translated code, expand the TRANS_DF_iv() macro.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20261029151317.19170-2-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
0926db9ded target/mips: Use CPU endianness in MSA LD.D / ST.D helpers 
helper_msa_ld_d() and helper_msa_st_d() use the legacy
cpu_ldq_data_ra() / cpu_stq_data_ra() accessors, whose endianness
is fixed at build time by TARGET_BIG_ENDIAN. All other MSA load
and store helpers check the vCPU endianness at runtime via
mips_env_is_bigendian().

Do the same for the doubleword variants, so they keep working
when the vCPU endianness differs from the build-time default.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261028180040.22848-6-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
7abb1a9933 target/mips: Do not use TARGET_BIG_ENDIAN in cpu.c 
Use the vCPU endianness (CP0_Config0.BE) to select the disassembler.
Default the "big-endian" property from target_big_endian() in
instance_init(), as the endianness might only be known at runtime
once user emulation selects it from the guest binary.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261028180040.22848-5-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
651ed27ac4 target/mips: Constify read-only CPUMIPSState arguments 
cpu_rddsp(), exception_resume_pc(), cpu_mips_get_random(),
mips_env_is_bigendian(), mo_endian_env() and sync_c0_status()
only read the CPU state passed as CPUMIPSState argument, make
it const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261028180040.22848-4-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
0955dc9de8 target/mips: Constify get_physical_address() 
get_physical_address() and its static helpers only read the
CPU state, make their CPUMIPSState argument const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261028180040.22848-3-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
a7bef76596 target/mips: Constify CPUMIPSTLBContext::map_address() handlers 
The map_address() handlers only read the CPU state, make
their CPUMIPSState argument const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261028180040.22848-2-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
df476add03 target/mips: Convert nanoMIPS LI opcodes to decodetree 
Convert LI[16] and LI[48]. LI[16] decodes its 3-bit register
with gpr3() and its immediate with s_eu() (0x7f encodes -1).
LI[48] takes a 32-bit immediate and is not available in NMS
cores; handle it in trans_LI_nnms(), which checks NMS before
calling trans_LI(). Expose check_nms() for that purpose.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261026162034.32711-15-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00
Philippe Mathieu-Daudé
19f580067e target/mips: Convert MIPS16e LI opcodes to decodetree 
Convert both the 16-bit RI and the extended EXT-RI forms.
Decode the destination with xlat(); both immediates are
zero-extended (8-bit and 16-bit).

The legacy decoder ignored EXT-RI bits [7:5]; the pattern
requires them to be zero, as specified. Other encodings
now raise a Reserved Instruction exception.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20261026162034.32711-14-philmd@oss.qualcomm.com>
 2026-11-02 17:05:34 +01:00