Commit Graph

126224 Commits

Author SHA1 Message Date
Richard Henderson
ffef4d5dd2 tcg: Drop TCG_TARGET_REG_BITS test in region.c
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
220ef471a2 tcg/tci: Remove glue TCG_TARGET_REG_BITS renames
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
245223f64d tcg/tci: Drop TCG_TARGET_REG_BITS tests
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
6e7b13936d tcg: Remove INDEX_op_dup2_vec
This opcode was exclusively for 32-bit hosts.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
2f4bf8148f tcg: Remove INDEX_op_setcond2_i32
This opcode was exclusively for 32-bit hosts.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
e3601d2cfc tcg: Remove INDEX_op_brcond2_i32
This opcode was exclusively for 32-bit hosts.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
1c3e1b41ca *: Drop TCG_TARGET_REG_BITS test for prefer_i64
Mechanically via sed -i.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
186993f23d tcg: Replace TCG_TARGET_REG_BITS / 8
Use sizeof(tcg_target_long) instead of division.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
9cc902d0bc tcg: Make TCG_TARGET_REG_BITS common
Since we only support 64-bit hosts, there's no real need
to parameterize TCG_TARGET_REG_BITS.  It seems worth holding
on to the identifier though, for documentation purposes.

Move one tcg/*/tcg-target-reg-bits.h to tcg/target-reg-bits.h
and remove the others.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:18 +11:00
Richard Henderson
35caceb700 meson: Remove cpu == riscv32 tests
The 32-bit riscv host is no longer supported.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:07 +11:00
Richard Henderson
264ae24c36 meson: Drop host_arch rename for riscv64
This requires renaming several directories:
tcg/riscv, linux-user/include/host/riscv, and
common-user/host/riscv.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:07 +11:00
Richard Henderson
e06980adea meson: Drop host_arch rename for mips64
This requires renaming several directories:
tcg/mips, linux-user/include/host/mips, and
common-user/host/mips.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:07 +11:00
Richard Henderson
904702f464 tcg/ppc64: Rename from ppc
Emphasize that we're generating 64-bit code.
Drop the explicit rename from meson's cpu.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:07 +11:00
Richard Henderson
02a2449fbe tcg/x86_64: Rename from i386
Emphasize that we're generating 64-bit code.
Drop the explicit rename from meson's cpu.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:46:07 +11:00
Richard Henderson
54a1ecd6d6 tcg/i386: Remove TCG_TARGET_REG_BITS tests
We now only support 64-bit code generation.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:40 +11:00
Richard Henderson
e23d76d896 *: Remove ppc host support
Move the files from host/include/ppc to host/include/ppc64,
replacing the stub headers that redirected to ppc.

Remove linux-user/include/host/ppc.
Remove common-user/host/ppc.
Remove cpu == ppc tests from meson.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:40 +11:00
Richard Henderson
c1997d85cb meson: Remove cpu == x86 tests
The 32-bit x86 host is no longer supported.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:39 +11:00
Richard Henderson
b83f9f99aa host/include/x86_64/bufferiszero: Remove no SSE2 fallback
Since x86_64 always has SSE2, we can remove the fallback
that was present for i686.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:39 +11:00
Richard Henderson
a2d76779d6 *: Remove i386 host support
Move the files from host/include/i386 to host/include/x86_64,
replacing the stub headers that redirected to i386.

Remove linux-user/include/host/i386.
Remove common-user/host/i386.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:39 +11:00
Richard Henderson
25512d6865 *: Remove __i386__ tests
Remove instances of __i386__, except from tests and imported headers.

Drop a block containing sanity check and fprintf error message for
i386-on-i386 or x86_64-on-x86_64 emulation.  If we really want
something like this, we would do it via some form of compile-time check.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:39 +11:00
Richard Henderson
369c1ba2b7 bsd-user: Fix __i386__ test for TARGET_HAS_STAT_TIME_T_EXT
The target test is TARGET_I386, not __i386__.

Cc: Kyle Evans <kevans@freebsd.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:45:14 +11:00
Richard Henderson
581b722144 *: Remove arm host support
Remove tcg/arm.
Remove instances of __arm__, except from tests and imported headers.
Remove arm from supported_cpus.
Remove linux-user/include/host/arm.
Remove common-user/host/arm.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:44:40 +11:00
Richard Henderson
212d309af1 meson: Drop cpu == wasm32 tests
The 32-bit wasm32 host is no longer supported.

Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:44:29 +11:00
Richard Henderson
372ec46b9f meson: Reject 32-bit hosts
32-bit hosts have been deprecated since 10.0.
As the first step, disable any such at configuration time.
Further patches will remove the dead code.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:44:20 +11:00
Richard Henderson
0d1137550b gitlab: Remove 32-bit host testing
These deprecated builds will be disabled.
Remove testing of armhf and i686.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:44:09 +11:00
Richard Henderson
f1f55e9886 tests/docker/dockerfiles: Drop wasm32 from emsdk-wasm-cross.docker
We will no longer build wasm32, so drop the docker config.
Streamline the dockerfile to hardcode TARGET_CPU as wasm64.

Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:34:31 +11:00
Richard Henderson
5053e0a65d gitlab-ci: Drop build-wasm32-32bit
Drop the wasm32 build and container jobs.

Reviewed-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-17 10:34:03 +11:00
Richard Henderson
42a5675aa9 Merge tag 'accel-20260116' of https://github.com/philmd/qemu into staging
Accelerators patches queue

- Enable 64bit WebAssembly guests (TCI)
- Fix migration on HVF
- Remove a signal race with WFI on HVF (Aarch64)
- Correct HVF guest timer frequency (Aarch64)
- Fix NVMM build (x86)

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* tag 'accel-20260116' of https://github.com/philmd/qemu: (30 commits)
  tests/functional: Require TCG to run reverse debugging tests
  target/i386/nvmm: Include missing ramlist.h header
  accel/nvmm: Fix 'cpu' typo in nvmm_init_vcpu()
  hmp-commands-info.hx: Move definition of "info accel"
  target/arm: Only allow disabling NEON when using TCG
  target/arm/hvf: Really set Generic Timer counter frequency
  target/arm: Create GTimers *after* features finalized / accel realized
  accel/hvf: Add hvf_arch_cpu_realize() stubs
  accel: Introduce AccelOpsClass::cpu_target_realize() hook
  accel/hvf: Have PSCI CPU_SUSPEND halt the vCPU
  accel/hvf: Implement WFI without using pselect()
  accel/hvf: Skip WFI if CPU has work to do
  target/arm/hvf: Implement dirty page tracking
  accel/hvf: Remove mac_slots
  accel/hvf: Drop hvf_slot and hvf_find_overlap_slot
  accel/hvf: Simplify hvf_set_phys_mem
  accel/hvf: Move hvf_log_sync to hvf_log_clear
  accel/hvf: Simplify hvf_log_*
  target/i386/hvf: Use address_space_translate in ept_emulation_fault
  target/i386/hvf: Use hvf_unprotect_dirty_range
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2026-01-16 22:26:36 +11:00
Philippe Mathieu-Daudé
7b87e00c25 tests/functional: Require TCG to run reverse debugging tests
Record/replay is specific to TCG. Require it to avoid failure
when using a HVF-only build on Darwin:

  qemu-system-aarch64: -icount shift=7,rr=record,rrfile=/scratch/replay.bin,rrsnapshot=init: cannot configure icount, TCG support not available

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20260115161029.24116-1-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Thomas Huth
9535803a9e target/i386/nvmm: Include missing ramlist.h header
Compiling on NetBSD currently fails with:

 ../src/target/i386/nvmm/nvmm-all.c:1136:22: error: unknown type name 'RAMBlockNotifier'
  1136 | nvmm_ram_block_added(RAMBlockNotifier *n, void *host, size_t size,
       |                      ^~~~~~~~~~~~~~~~
 ../src/target/i386/nvmm/nvmm-all.c:1152:15: error: variable 'nvmm_ram_notifier' has initializer but incomplete type
  1152 | static struct RAMBlockNotifier nvmm_ram_notifier = {
       |               ^~~~~~~~~~~~~~~~
 ../src/target/i386/nvmm/nvmm-all.c:1153:6: error: 'struct RAMBlockNotifier' has no member named 'ram_block_added'
  1153 |     .ram_block_added = nvmm_ram_block_added
       |      ^~~~~~~~~~~~~~~
 ../src/target/i386/nvmm/nvmm-all.c:1153:24: error: 'nvmm_ram_block_added' undeclared here (not in a function)
  1153 |     .ram_block_added = nvmm_ram_block_added
       |                        ^~~~~~~~~~~~~~~~~~~~

Include the right header to get this fixed.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <20260114083812.18496-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
7be4256281 accel/nvmm: Fix 'cpu' typo in nvmm_init_vcpu()
Fix typo to avoid the following build failure:

  target/i386/nvmm/nvmm-all.c: In function 'nvmm_init_vcpu':
  target/i386/nvmm/nvmm-all.c:988:9: error: 'AccelCPUState' has no member named 'vcpu_dirty'
    988 |     qcpu->vcpu_dirty = true;
        |         ^~

Cc: qemu-stable@nongnu.org
Reported-by: Thomas Huth <thuth@redhat.com>
Fixes: 2098164a6b ("accel/nvmm: Replace @dirty field by generic CPUState::vcpu_dirty field")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260113203924.81560-1-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Markus Armbruster
688f20dbde hmp-commands-info.hx: Move definition of "info accel"
Commit c10eb74010 (accel/system: Add 'info accel' on human monitor)
inserted "info accel" in the middle of "info sync-profile".  Move it
behind "info sync-profile".

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260116005050.376616-2-dave@treblig.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
f46f05b6d8 target/arm: Only allow disabling NEON when using TCG
Only allow disabling NEON when using TCG.

This avoids confusing user experience:

  $ qemu-system-aarch64 -M virt -accel hvf \
                        -cpu host,neon=off,vfp=off,vfp-d32=off
  qemu-system-aarch64: AArch64 CPUs must have both VFP and Neon or neither

  $ qemu-system-aarch64 -M virt -accel hvf \
                        -cpu host,neon=off,vfp=off,vfp-d32=off
  qemu-system-aarch64: ARM CPUs must have both VFP-D32 and Neon or neither

  $ qemu-system-aarch64 -M virt -accel hvf \
                        -cpu host,neon=off,vfp=off,vfp-d32=off
  qemu-system-aarch64: can't apply global host-arm-cpu.vfp-d32=off: Property 'host-arm-cpu.vfp-d32' not found

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-20-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
7f359375fc target/arm/hvf: Really set Generic Timer counter frequency
Setting ARMCPU::gt_cntfrq_hz in hvf_arch_init_vcpu() is
not correct because the timers have already be initialized
with the default frequency.

Set it earlier in the AccelOpsClass::cpu_target_realize()
handler instead, and assert the value is correct when
reaching hvf_arch_init_vcpu().

Fixes: a1477da3dd ("hvf: Add Apple Silicon support")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251103101034.59039-19-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
6e18afcd31 target/arm: Create GTimers *after* features finalized / accel realized
Call generic (including accelerator) cpu_realize() handlers
*before* setting @gt_cntfrq_hz default

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251103101034.59039-18-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
b2d57718a9 accel/hvf: Add hvf_arch_cpu_realize() stubs
Implement HVF AccelOpsClass::cpu_target_realize() hook as
empty stubs. Target implementations will come separately.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-17-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
e4f6a02d86 accel: Introduce AccelOpsClass::cpu_target_realize() hook
Allow accelerators to set vCPU properties before its realization.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251103101034.59039-16-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
6ca499b791 accel/hvf: Have PSCI CPU_SUSPEND halt the vCPU
Return EXCP_HLT to the main loop.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-15-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
b5f8f77271 accel/hvf: Implement WFI without using pselect()
Return to the main loop where we'll be waken again.
This avoid a tricky race with signals introduced in
commit 219c101fa7 ("Add HVF WFI handler").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-14-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Philippe Mathieu-Daudé
a14afa985e accel/hvf: Skip WFI if CPU has work to do
Avoid sleeping vCPU thread for any pending work, not just IRQs.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-13-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
58bc47fd1c target/arm/hvf: Implement dirty page tracking
Notice writes to pages which are being monitored.  Mark the page dirty,
re-enable writes, and retry the instruction without emulation.

Assert the fault is not from a stage1 page table walk.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-12-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
7d7654a643 accel/hvf: Remove mac_slots
This data structure is no longer used.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-11-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
6bf331164c accel/hvf: Drop hvf_slot and hvf_find_overlap_slot
These are now unused.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-10-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
d1f4ba9d94 accel/hvf: Simplify hvf_set_phys_mem
All of the complicated parts of updating the address space
are handled by address_space_update_topology_pass.
Do not create or use hvf_slot structures.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-9-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
1b6261bfc0 accel/hvf: Move hvf_log_sync to hvf_log_clear
Right idea, wrong hook.  log_sync is called before using
dirty bit data (which for hvf is already up-to-date),
whereas log_clear is called before cleaning the range.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-8-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
6d0a5a4456 accel/hvf: Simplify hvf_log_*
Rely on the AddressSpace and MemoryRegion structures
rather than hvf_slot.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-7-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
ef878343e8 target/i386/hvf: Use address_space_translate in ept_emulation_fault
The hvf_slot structure is a poor replacement for properly
looking up a memory region in the address space.
Use memory_region_get_dirty_log_mask instead of HVF_SLOT_LOG.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251103101034.59039-6-philmd@linaro.org>
2026-01-16 11:17:28 +01:00
Richard Henderson
36d5b5caaa target/i386/hvf: Use hvf_unprotect_dirty_range
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-5-philmd@linaro.org>
2026-01-16 09:22:16 +01:00
Philippe Mathieu-Daudé
0b36673c27 accel/hvf: Enforce host alignment in hv_vm_protect()
hv_vm_protect() arguments must be aligned to host page.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20260112103034.65310-4-philmd@linaro.org>
2026-01-16 09:22:16 +01:00
Philippe Mathieu-Daudé
f1c59f59bd target/i386/hvf: Use host page alignment in ept_emulation_fault()
While on x86 the host page size is fixed to 4KB, it is
better to call qemu_real_host_page_size() for consistency.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Message-ID: <20251103101034.59039-3-philmd@linaro.org>
2026-01-16 09:22:16 +01:00