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Move the following TCG-specific cpu_loop_exit_*() declarations out of the generic "exec/cpu-common.h" header, to the recently created "accel/tcg/cpu-loop.h" one, documenting them: - cpu_loop_exit_noexc() - cpu_loop_exit_atomic() - cpu_loop_exit_restore() - cpu_loop_exit() Include "accel/tcg/cpu-loop.h" where appropriate. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260617171438.75914-11-philmd@oss.qualcomm.com>
116 lines
3.3 KiB
C
116 lines
3.3 KiB
C
/*
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* CPU interfaces that are target independent.
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: LGPL-2.1+
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*/
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#ifndef CPU_COMMON_H
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#define CPU_COMMON_H
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#include "qemu/thread.h"
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#include "hw/core/cpu.h"
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#define EXCP_INTERRUPT 0x10000 /* async interruption */
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#define EXCP_HLT 0x10001 /* hlt instruction reached */
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#define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */
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#define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */
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#define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */
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#define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */
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#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size())
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/* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */
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extern QemuMutex qemu_cpu_list_lock;
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void qemu_init_cpu_list(void);
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void cpu_list_lock(void);
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void cpu_list_unlock(void);
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unsigned int cpu_list_generation_id_get(void);
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int cpu_get_free_index(void);
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/**
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* cpu_address_space_init:
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* @cpu: CPU to add this address space to
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* @asidx: integer index of this address space
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* @prefix: prefix to be used as name of address space
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* @mr: the root memory region of address space
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*
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* Add the specified address space to the CPU's cpu_ases list.
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* The address space added with @asidx 0 is the one used for the
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* convenience pointer cpu->as.
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* The target-specific code which registers ASes is responsible
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* for defining what semantics address space 0, 1, 2, etc have.
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*
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* Note that with KVM only one address space is supported.
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*/
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void cpu_address_space_init(CPUState *cpu, int asidx,
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const char *prefix, MemoryRegion *mr);
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/**
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* cpu_destroy_address_spaces:
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* @cpu: CPU for which address spaces need to be destroyed
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*
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* Destroy all address spaces associated with this CPU; this
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* is called as part of unrealizing the CPU.
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*/
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void cpu_destroy_address_spaces(CPUState *cpu);
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/* vl.c */
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void list_cpus(void);
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#ifdef CONFIG_TCG
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#include "qemu/atomic.h"
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/**
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* cpu_loop_exit_requested:
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* @cpu: The CPU state to be tested
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*
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* Indicate if somebody asked for a return of the CPU to the main loop
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* (e.g., via cpu_exit() or cpu_interrupt()).
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*
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* This is helpful for architectures that support interruptible
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* instructions. After writing back all state to registers/memory, this
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* call can be used to check if it makes sense to return to the main loop
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* or to continue executing the interruptible instruction.
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*/
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static inline bool cpu_loop_exit_requested(const CPUState *cpu)
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{
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return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0;
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}
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#endif /* CONFIG_TCG */
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/**
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* env_archcpu(env)
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* @env: The architecture environment
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*
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* Return the ArchCPU associated with the environment.
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*/
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static inline ArchCPU *env_archcpu(CPUArchState *env)
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{
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return (void *)env - sizeof(CPUState);
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}
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/**
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* env_cpu_const(env)
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* @env: The architecture environment
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*
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* Return the CPUState associated with the environment.
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*/
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static inline const CPUState *env_cpu_const(const CPUArchState *env)
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{
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return (void *)env - sizeof(CPUState);
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}
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/**
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* env_cpu(env)
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* @env: The architecture environment
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*
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* Return the CPUState associated with the environment.
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*/
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static inline CPUState *env_cpu(CPUArchState *env)
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{
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return (CPUState *)env_cpu_const(env);
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}
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#endif /* CPU_COMMON_H */
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