Tom Musta d359db00e6 target-ppc: Correct LE Host Inversion of Lower VSRs
This change properly orders the doublewords of the VSRs 0-31.  Because these
registers are constructed from separate doublewords, they must be inverted
on Little Endian hosts.  The inversion is performed both when the VSR is read
and when it is written.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2014-04-08 11:20:02 +02:00
2013-04-18 13:50:53 +02:00
2013-08-07 12:48:00 -05:00
2014-03-03 09:46:27 +04:00
2014-03-25 14:09:50 +01:00
2014-04-07 18:33:22 +02:00
2012-09-07 09:02:44 +03:00
2014-03-12 17:26:32 +01:00
2013-09-05 09:40:31 -05:00
2013-10-11 09:34:56 -07:00
…
2014-03-19 19:47:15 +01:00
2013-07-23 02:41:31 +02:00
2013-02-21 16:17:31 -06:00
2013-08-12 09:15:12 -05:00
2014-04-07 10:50:30 +02:00
2014-04-07 15:19:16 +01:00
2014-03-13 14:42:24 +01:00
2013-09-03 12:25:55 +02:00
2014-03-27 15:19:00 +05:30
2014-02-21 21:02:23 +01:00
2014-03-13 14:34:16 +00:00
2014-02-25 14:30:28 +01:00
2014-03-27 15:19:00 +05:30
2014-03-17 13:21:11 +01:00
2013-12-04 15:19:00 +01:00
2014-03-05 03:06:24 +01:00
2013-10-11 09:34:56 -07:00
2014-03-27 15:19:00 +05:30
2013-09-25 21:23:05 +02:00
2014-02-17 11:57:23 -05:00
2014-04-03 15:51:01 +01:00
2013-10-11 09:34:56 -07:00
2014-03-27 15:19:00 +05:30
2013-04-08 18:13:10 +02:00

Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org

- QEMU team
Description
No description provided
Readme 830 MiB
Languages
C 83.4%
C++ 6%
Python 3.5%
Dylan 2.7%
Shell 1.2%
Other 3%