AMD K6-2 onwards: EFER write GPF is now correctly on bits 5 onwards, not on bits 1 onwards.

This commit is contained in:
OBattler
2024-10-01 09:56:40 +02:00
parent 1e84b46a5d
commit 8899b1411b

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@@ -3705,7 +3705,7 @@ cpu_WRMSR(void)
/* Extended Feature Enable Register */
case 0xc0000080:
temp = EAX | ((uint64_t) EDX << 32);
if (temp & ~1ULL)
if (temp & ~0x1fULL)
x86gpf(NULL, 0);
else
msr.amd_efer = temp;