86Box

82c100.c

Constification

2023-07-25 17:59:24 -04:00

acc2168.c

Constification

2023-07-25 17:59:24 -04:00

ali1429.c

Constification

2023-07-25 17:59:24 -04:00

ali1435.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

ali1489.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

ali1531.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

ali1541.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

ali1543.c

Reimplemented ALi M1543(C) NVR SMI# handling, fixes #3278 .

2023-08-19 01:39:30 +02:00

ali1621.c

Better fallthrough annotation macro.

2023-08-09 20:09:36 -04:00

ali6117.c

Better fallthrough annotation macro.

2023-08-09 20:09:36 -04:00

CMakeLists.txt

Added the OPTi 82c602, on-board CL-GD 5430, and also gave the PC87306 Super I/O chip its full NVR capabilities, fixes #2877 .

2023-08-15 06:45:02 +02:00

compaq_386.c

RichardG is right, the Compaq 386 Memory Control is absolutely not the OPTi 391.

2023-08-24 20:25:27 +02:00

contaq_82c59x.c

Next round of sonarlint cleanups

2023-06-27 21:17:13 -04:00

cs4031.c

Constification

2023-07-25 17:59:24 -04:00

cs8230.c

Constification

2023-07-25 17:59:24 -04:00

et6000.c

Constification

2023-07-25 17:59:24 -04:00

gc100.c

Constification

2023-07-25 17:59:24 -04:00

headland.c

More sonarlint work

2023-07-25 17:59:22 -04:00

ims8848.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

intel_4x0.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

intel_420ex.c

Disabled the DRAM row emulation on the 420EX and SiS 496/497, should fix memory with machines using those chipsets.

2023-08-24 16:59:57 +02:00

intel_82335.c

Constification

2023-07-25 17:59:24 -04:00

intel_i450kx.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

intel_piix.c

Timer clean-ups.

2023-08-19 05:26:49 +02:00

intel_sio.c

Timer clean-ups.

2023-08-19 05:26:49 +02:00

neat.c

Constification

2023-07-25 17:59:24 -04:00

olivetti_eva.c

More linting in src/chipset

2023-08-22 19:50:44 -04:00

opti5x7.c

Constification

2023-07-25 17:59:24 -04:00

opti283.c

Better fallthrough annotation macro.

2023-08-09 20:09:36 -04:00

opti291.c

Constification

2023-07-25 17:59:24 -04:00

opti391.c

Constification

2023-07-25 17:59:24 -04:00

opti495.c

Constification

2023-07-25 17:59:24 -04:00

opti499.c

Next round of sonarlint cleanups

2023-06-27 21:17:13 -04:00

opti602.c

More linting in src/chipset

2023-08-22 19:50:44 -04:00

opti822.c

More linting in src/chipset

2023-08-22 19:50:44 -04:00

opti895.c

Added the OPTi 82c602, on-board CL-GD 5430, and also gave the PC87306 Super I/O chip its full NVR capabilities, fixes #2877 .

2023-08-15 06:45:02 +02:00

scamp.c

Constification

2023-07-25 17:59:24 -04:00

scat.c

Constification

2023-07-25 17:59:24 -04:00

sis_85c4xx.c

Next round of sonarlint cleanups

2023-06-27 21:17:13 -04:00

sis_85c50x.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

sis_85c310.c

Next round of sonarlint cleanups

2023-06-27 21:17:13 -04:00

sis_85c496.c

Disabled the DRAM row emulation on the 420EX and SiS 496/497, should fix memory with machines using those chipsets.

2023-08-24 16:59:57 +02:00

sis_5511.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

sis_5571.c

Reverted Cacodemon345's broken USB OHCI implementation, fixes #3597 .

2023-08-18 23:16:54 +02:00

stpc.c

Reverted Cacodemon345's broken USB OHCI implementation, fixes #3597 .

2023-08-18 23:16:54 +02:00

umc_8886.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

umc_hb4.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

via_apollo.c

Assorted copyright header fixes.

2023-08-14 21:51:47 +02:00

via_pipc.c

Assorted copyright header fixes.

2023-08-14 21:51:47 +02:00

via_vt82c49x.c

Constification

2023-07-25 17:59:24 -04:00

via_vt82c505.c

PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

2023-08-07 03:04:52 +02:00

vl82c480.c

Constification

2023-07-25 17:59:24 -04:00

wd76c10.c

Constification

2023-07-25 17:59:24 -04:00