Commit Graph

37943 Commits

Author SHA1 Message Date
Liu Ying
5d7015235b ENGR00125552-1 MX5:Change LDB related video mode names
Make LDB related video mode names be common names because the
video names may be used by other devices besides LVDS panels.

Signed-off-by: Liu Ying <b17645@freescale.com>
(cherry picked from commit 65ff4bdb388474875d2111b412c6375e0d1ce0c2)
2010-08-10 11:52:07 -05:00
Frank Li
53236d2f9f ENGR00125056-2 MX5: Fix one wire wrong clock name
one wire master driver is coming from upstream.
clock name is owire, not owire_clk

Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-08-10 11:51:55 -05:00
Frank Li
50deabf327 ENGR00125056-1 MX50: add one wire pin configuration
Add "w1" setup at mx50 pin defination because 1wire pin used
for usb over current default.
Fix multi w1_setup problem at many i.MX platform. Only first one
is run by main.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-08-10 11:51:54 -05:00
Richard Zhu
a3233fffd6 ENGR00125052-3 Enable the eMMC44 DDR mode on MX53 EVK
The platform related codes' modifications
when enable the eMMC44 DDR mode on MX53 EVK board

Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-08-10 11:51:53 -05:00
Aisheng.Dong
76ab3905ed ENGR00125205 mx50: add esdhc3 support
Add IOMUX and configuration data for esdhc3

Signed-off-by: Aisheng.Dong <b29396@freescale.com>
2010-08-10 11:51:50 -05:00
Liu Ying
07b1b808bb ENGR00124989-2 MX5:Change CLAA-WVGA LCD panel video mode
Set pixel clock rate for CLAA-WVGA LCD panel for 27MHz and
set the display frequency to be 57Hz. This makes the panel
to get rid of water wave glitch issue on MX50 platform.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:51:49 -05:00
Liu Ying
a7a490209a ENGR00124989-1 MX508:Configure ELCDIF pads attribute
1) Enable keepers for LCDIF pads.
2) Remove input path selection for LCDIF pads.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:51:49 -05:00
Shen Yong
f39d50feb1 ENGR00124132 MX53: busfreq driver support
1. adjust lp_clk, ddr_clk MX53 and MX51 uses different one
2. adjust cpu rate in cpu_wp_table
3. enable clock divider handshaking when ddr clock changing
4. add AHB_MED_SET_POINT to ldb_di_clk
5. adjust the bit define about CCDR register

Signed-off-by: Shen Yong <b00984@freescale.com>
2010-08-10 11:51:48 -05:00
Richard Zhao
063544faec ENGR00125010-3 MX35: add gpu to imx35_3stack_defconfig
Build as module by default.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2010-08-10 11:51:47 -05:00
Richard Zhao
d28a6d6b8d ENGR00125010-2 MX5: add gpu to imx5_defconfig
Build as module by default.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2010-08-10 11:51:47 -05:00
Lily Zhang
0c28025916 ENGR00125045 MX53: Adjust VDDGP voltage setting
1. Adjust VDDGP for 1GHZ as 1.15v
2. Adjust VDDGP for 800MHZ as 1.05v
3. Not all current MX53 boards can run up to 1GHZ. So one limitation is
added into clock.c to limit 1GHZ working point. To enable 1GHZ
working point in kernel, please increase the GP voltage and type the
command "clk core 1000" in uboot console to switch CPU core to 1GHZ.
This limitation will be removed after all boards support 1GHZ.

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:42 -05:00
Richard Zhao
0886df99c7 ENGR00125169 MX5: only reset nfc in arch_reset when we have it
it fix mx50 reboot wdog reg write failed issue.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
2010-08-10 11:51:42 -05:00
Danny Nold
9094f00c97 ENGR00125113 - imx5_defconfig update - Add PxP, Max17135, and EPDC
MX50 requires inclusion of PxP, Maxim 17135, and EPDC drivers as defaults
in order to have proper E-Ink display support.

Signed-off-by: Danny Nold <dannynold@freescale.com>
2010-08-10 11:51:39 -05:00
Richard Zhu
656eb1788e ENGR00124255 Reconfigure MX5x's eSDHC iomux PAD's configurations
Reconfigure the PAD's configurations to level up the HW
timing compatibility.

MX51:Some MMC cards such as transcend mmc plus cards can't
be recognized and initialized correctly on the second
esdhc slot of the BBG boards that populated the new DDR chips.
MX53:Same Kingstone SDHC card can work well on EVK REVA board, but
failed in initialization on EVK REVB board without
any sw modifications.
After adjust the slot pin's pad configurations,
fix the HW compatible issues listed above.

Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-08-10 11:51:37 -05:00
Danny Nold
fcb535c325 ENGR00124812-2: MX50 add Max17135 Display pmic init to MSL
Maxim 17135 PMIC init added to MSL in conjunction with addition
of Maxim 17135 regulator driver and I2C client.

Signed-off-by: Danny Nold <dannynold@freescale.com>
2010-08-10 11:51:35 -05:00
Hu hui
8917d92d1a ENGR00124963 USB: add vbus enable/disable
support imx53 evk board OTG and Host1 vbus active
and inactive to low the power consume, fix fsl_otg.c
build failt, add vbus power control function pointer
in struct fsl_usb2_platform_data.

Signed-off-by: Hu hui <b29976@freescale.com>
2010-08-10 11:51:32 -05:00
Dinh Nguyen
609a873cba ENGR00125007: MX50: Correct PAD settings for over-current detection
The pad settings for the over-current detection pins on MX50 ARM2
CPU board needs to have a pull-up.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
2010-08-10 11:51:32 -05:00
Rob Herring
f743db423b ENGR00124986 mx5: add gpu refcounting and increase command buffer
Add reference counting of driver opens for multi-context support.
Increase command buffer to 64KB.

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:31 -05:00
Sammy He
96c83b496b ENGR00124956 Increase vpu iram size to 80K
Increase vpu iram size to 80K on mx51 and mx53 to
use more iram for video decoding and encoding.
It can cover 720P encoder and 1080P decoder except VC-1 AP.

Signed-off-by: Sammy He <r62914@freescale.com>w
2010-08-10 11:51:30 -05:00
Rob Herring
4eb3881046 ENGR00124849-3 mx5: add mx50 support
Add support for i.MX50 and arm2 board with lpddr/mddr.

Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:29 -05:00
Rob Herring
ee073106c8 ENGR00124849-2: mx5: clean-up serial configuration code
The serial device setup code includes board configuration header,
but is common for all boards. So make the configuration common for
all boards and remove the board headers as nothing else is used.

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:28 -05:00
Rob Herring
bf505aeb11 ENGR00124849-1 mx5: clean-up some includes of crm_regs.h
CCM is different on various MX5x chips, so limit its include.
SRPG is only initialized on MX51 3DS, but should be done on all
MX5x chips.

Signed-off-by: Rob Herring <r.herring@freescale.com>
2010-08-10 11:51:28 -05:00
William Lai
7ee939a4e2 ENGR00124740-4 MX25/35 ALSA: Changes due to ESAI as platform device
Make ESAI as a platform device, and pass the audio data to use
the external memory by default.

Signed-off-by: William Lai <b04597@freescale.com>
2010-08-10 11:51:27 -05:00
William Lai
8a6fb9a964 ENGR00124740-3 MX53 : Multi-channel audio support
CS4288 is built in as default for MX53, but with a command parameter
of apc in the commandline to enable.

Signed-off-by: William Lai <b04597@freescale.com>
2010-08-10 11:51:26 -05:00
William Lai
777a330e23 ENGR00124740-1 MX53 ALSA: Make ESAI as a platform device
Make ESAI a platform device and pass the register base address
by resource and then use ioremap.

Signed-off-by: William Lai <b04597@freescale.com>
2010-08-10 11:51:25 -05:00
Richard Zhu
80d50bfa3f ENGR00124256 Linux platform integrated AHCI SATA driver
Sata can work well on EVK boards, and pass the unit-tests.

Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-08-10 11:51:22 -05:00
Lily Zhang
57391d659a ENGR00124864 MX5: Fix MSL issue
1. correct mx53 sdma script variable
2. CSPI should not use cspi_main_clk
3. remove duplicated M4IF setting codes in clock.c, which
are already in cpu.c

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:21 -05:00
Richard Zhu
1dc8f0e201 ENGR00124736 Remerge the minor modifications to mainline
1 correct the pata platform device resource check codes
2 Change the end statment of the sdhc1 det pin
iomux definition on mx51 board from ',' to ';'.
3 sdhc driver max blk count on MX31, sinc
customer report that the emmc would be failed when
the blk count is more than 32.

Signed-off-by: Richard Zhu <r65037@freescale.com>
2010-08-10 11:51:21 -05:00
Lily Zhang
3a8994f9c7 ENGR00124795 SPI NOR: uniform include header file
The default partitions are missing in MX53 SPI NOR MTD.
It's because spi nor driver and mx53 msl include different
header files. It causes struct definitions are different.
For i.MX SPI nor driver, need to use asm/mach/flash.h by
aligning with NAND driver.

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:19 -05:00
Peter Chen
9a8774c3b9 ENGR00124629 mx5x: Add Watchdog config for mfg defconfig
If not, the board will be reset as no one
serices the watchdog.
At USB recovery mode, the watchdog will be
enabled at rom code.

Signed-off-by: Peter Chen <b29397@freescale.com>
2010-08-10 11:51:17 -05:00
Lily Zhang
b3dcff4217 ENGR00124762 MX5: Fix clock div zero issue
Fix clock div zero issue in mx5 clock file

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:17 -05:00
Sammy He
3e0c7cb2ff ENGR00124683-3 Add ADV7180 TV decoder support on mx53
Add ADV7180 TV decoder support on mx53. OV3640 module must be
removed before ADV7180 TVIN test.

Signed-off-by: Sammy He <r62914@freescale.com>
2010-08-10 11:51:16 -05:00
Sammy He
163b5ed0ea ENGR00124683-2 Change adv7180_pwdn callback function on mx35
Change adv7180_pwdn callback function on mx35 due to pwdn parameter
defintion update.

Signed-off-by: Sammy He <r62914@freescale.com>
2010-08-10 11:51:15 -05:00
Sammy He
9fe0e34c9f ENGR00124683-1 Add CCIR interlaced mode for TV decoder
Add CCIR interlaced mode for TV decoder. And add pwdn callback
function in mxc_camera_platform_data.

Signed-off-by: Sammy He <r62914@freescale.com>
2010-08-10 11:51:15 -05:00
Lionel Xu
2df29e84b6 ENGR00122302 MX23 ALSA: Resolve the failure when pausing and resuming playback
To reslove the problem when resuming a playback from pausing

Signed-off-by: Lionel Xu <r63889@freescale.com>
2010-08-10 11:51:10 -05:00
Lily Zhang
b0c5c97d03 ENGR00123738 MX53: Fix MLB issue caused by emi_int2 clock
1. MLB can only work with "jtag=on" option enable or after system
resume now. It's cuased by emi_int2 clock gate bit setting.
MX53 enables the internal memory power saving mode which requires
emi_intr CCGR bits must be set as 0x11 if using IRAM. To fix current
issue, add additional mlb clock which is associated with emi_int2.
2. Update MLB PIN setting.

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:09 -05:00
Frank Li
2ccf7d1582 ENGR00124562 MX28 add persistent bit support
Add persistent bit for MX28

Signed-off-by: Frank Li <Frank.Li@freescale.com>
2010-08-10 11:51:08 -05:00
Peter Chen
d4946d871c ENGR00124390 MX35:Update new mfg defconfig for supporting both sd and nand
The old one can't work and no ubi support

Signed-off-by: Peter Chen <b29397@freescale.com>
2010-08-10 11:51:07 -05:00
Nancy Chen
27595891b9 ENGR00124287 MX5x, MX37: Fix DVFS memory resource issue
MX5x, MX37: Fix DVFS memory resource issue.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-08-10 11:51:06 -05:00
Lily Zhang
48ff3cbb9e ENGR00124326 MX53: Add SPDIF Tx support
Add SPDIF Tx support for MX53 EVK board.
1. Support 44.1KHZ sample rate.
2. 48K and 32K sample rates require 24.576MHZ OSC connected to
CKIH2. But it's "DNP" in EVK.

Test conditions:
1. Connect MX51 Accessory Card with J94 port in EVK.
2. SPDIF_OUT pin conflicts with 12V pin used by CAN feature.
Add "spdif" command option in the command line to enable SPDIF

Signed-off-by: Lily Zhang <r58066@freescale.com>
2010-08-10 11:51:05 -05:00
Peter Chen
ee2d41156d ENGR00124224 mx51: Update the new mfg default config according to mx5_defconfig
The old imx51_updater_defconfig is out-dated, so delete it,
and mfg firmware will use imx5_updater_defconfig in future.

Signed-off-by: Peter Chen <b29397@freescale.com>
2010-08-10 11:50:50 -05:00
Nancy Chen
92797b88b0 ENGR00120301 MX51: Fix slow TS issue
MX51: Fix slow TS issue.

Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
2010-08-10 11:50:49 -05:00
Peter Chen
f0125b7c53 ENGR00124168 imx28: fix bug that USB gadget driver can't work
1. USB gadget driver can't work if we insmod usb host module first,
At default, we should not define CONFIG_USB_EHCI_ARC_OTG
(Taking the first usb port as host), otherwise the usb gadget driver
will can't work due to its resource have already claimed by usb0 host.
2. Fixes some warnings and error format for Kconfig
and defconfig

Signed-off-by: Peter Chen <b29397@freescale.com>
2010-08-10 11:50:49 -05:00
Peter Chen
c83903e8db ENGR00124167 [mfg-tool]: Enhancement the UTP protocol
Enhancement the UTP protocol and give more comments
for source code

Signed-off-by: Peter Chen <b29397@freescale.com>
2010-08-10 11:50:47 -05:00
Jeremy.Yao
8758315ddf ENGR00123589: Console can wakeup system while it is not wakeup source
Add debug-uart pm function

Signed-off-by: Jeremy Yao <r65161@freescale.com>
2010-08-10 11:50:45 -05:00
Shen Yong
12aab18ada ENGR00122599 MX53: DVFS-core support
add dvfs-core platform device and device data

Signed-off-by: Shen Yong <b00984@freescale.com>
2010-08-10 11:50:44 -05:00
Ranjani Vaidyanathan-RA5478
19bdd60a11 ENGR00123982: Fix GPU clocking scheme on MX51 & MX53.
Add appropriate secondary clocks to GPU2d and GPU3d clocks.
Also fix the naming scheme for the clocks needed by GPU so
that the same clocks can be used on both MX51 and MX53.
Fixed the round_rate function for many clocks so that the rate
returned is not greater than the maximum rate supported for that clock.

Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
2010-08-10 11:50:44 -05:00
Alan Tull
c65e5f8992 ENGR00123838 alsa: fall back to external ram if iram fails
If iram_alloc fails, should warn and fall back to external ram.

Signed-off-by: Alan Tull <r80115@freescale.com>
2010-08-10 11:50:43 -05:00
Liu Ying
d726cdab5d ENGR00123863 MX53 Clock:Set AXI_B_CLK to be 200MHz
Set AXI_B_CLK to be 200MHz in case it is set to other clock rate in bootloader.
This can make sure IPU has sufficient clock rate.

Signed-off-by: Liu Ying <b17645@freescale.com>
2010-08-10 11:50:42 -05:00
Patrick Turley
b422b1ca4e ENGR00123828 Improved timing for the i.MX23/i.MX28 NAND Flash driver
Added improved timing calculations to the driver, and various other
support work.

Signed-off-by: Patrick Turley <patrick.turley@freescale.com>
2010-08-10 11:50:42 -05:00