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target/sh4: fixup tcg for sh4 fipr/ftrv instructions

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Fixes TCG generation for sh4 `fipr` and `ftrv` instructions.
Updates the current logic for these instructions to check the
FPSCR register appropriately (according to the sh4 cpu manual, `fipr`
and `ftrv` are only defined when the FPSCR register PR flag is 0).
Also fixes the mth/nth-vector operands by multiplying by 4 to convert
to the correct floating point register offset.

Signed-off-by: Randy Schifflin <randy.schifflin@gmail.com>
Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com>
Message-ID: <20260629-fixup-sh4-tcg-fpu-instructions-b4-v1-2-4356b305f971@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
This commit is contained in:
Randy Schifflin
2026-06-29 14:49:13 -07:00
committed by Philippe Mathieu-Daudé
parent b6726871b9
commit 614a52cf54
2 changed files with 6 additions and 11 deletions
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2
target/sh4/op_helper.c
View File

@@ -488,7 +488,7 @@ void helper_ftrv(CPUSH4State *env, uint32_t n)
float32 p;
bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
bank_vector = (env->sr & FPSCR_FR) ? 16 + n : n;
set_float_exception_flags(0, &env->fp_status);
for (i = 0 ; i < 4 ; i++) {
r[i] = float32_zero;

15
target/sh4/translate.c
View File

@@ -377,11 +377,6 @@ static inline void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
goto do_illegal; \
}
#define CHECK_FPSCR_PR_1 \
if (!(ctx->tbflags & FPSCR_PR)) { \
goto do_illegal; \
}
#define CHECK_SH4A \
if (!(ctx->features & SH_FEATURE_SH4A)) { \
goto do_illegal; \
@@ -1740,22 +1735,22 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0xf0ed: /* fipr FVm,FVn */
CHECK_FPU_ENABLED
CHECK_FPSCR_PR_1
CHECK_FPSCR_PR_0
{
TCGv m = tcg_constant_i32((ctx->opcode >> 8) & 3);
TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3);
TCGv m = tcg_constant_i32(((ctx->opcode >> 8) & 3) << 2);
TCGv n = tcg_constant_i32(((ctx->opcode >> 10) & 3) << 2);
gen_helper_fipr(tcg_env, m, n);
return;
}
break;
case 0xf0fd: /* ftrv XMTRX,FVn */
CHECK_FPU_ENABLED
CHECK_FPSCR_PR_1
CHECK_FPSCR_PR_0
{
if ((ctx->opcode & 0x0300) != 0x0100) {
goto do_illegal;
}
TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3);
TCGv n = tcg_constant_i32(((ctx->opcode >> 10) & 3) << 2);
gen_helper_ftrv(tcg_env, n);
return;
}