19491 Commits

Author SHA1 Message Date
Stefan Hajnoczi
8dcbb339f5 Merge tag 'pull-tcg-20260707' of https://gitlab.com/rth7680/qemu into staging
tcg/loongarch64: Fix cmp_vec with TCG_COND_NE
tcg/x86_64: declare MO_ATOM_WITHIN16 host atomicity support
accel/tcg: Make PageFlagsNodes' start and last immutable
accel/tcg: Use TLB_FORCE_SLOW not TLB_MMIO for user-only plugins

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# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20260707' of https://gitlab.com/rth7680/qemu:
  tcg/loongarch64: Fix cmp_vec with TCG_COND_NE
  tcg/x86_64: declare MO_ATOM_WITHIN16 host atomicity support
  Revert "tests/tcg: skip the vma-pthread test on CI"
  tests/tcg/multiarch: Improve mutator randomness
  accel/tcg: Make PageFlagsNodes' start and last immutable
  accel/tcg: Use TLB_FORCE_SLOW not TLB_MMIO for user-only plugins

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-08 16:00:20 +02:00
Stefan Hajnoczi
c3a63b7c06 Merge tag 'hw-misc-20260707' of https://github.com/philmd/qemu into staging
Misc HW patches

- MAINTAINERS update
- Fix in few trace event formats
- A pair of improvements in util/
- FlexCAN3 to imx8mp-evk board
- Various fixes in hw/
  (EDU, ATI VGA, IDE AHCI, PCA9552, i8257 DMA,
   e1000e/igb, MPT SAS, Hyper-V, QXL, M25P80)

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# gpg: Signature made Tue 07 Jul 2026 17:12:08 CEST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20260707' of https://github.com/philmd/qemu: (36 commits)
  MAINTAINERS: update Chao Liu's email address
  Revert "aspeed/smc: snoop SPI transfers to fake dummy cycles"
  Revert "aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command"
  hw/ssi: aspeed_smc: Fix direct-read dummy bytes
  hw/ssi: xilinx_spips: Fix dummy phase handling
  hw/ssi: npcm7xx_fiu: Correct the dummy cycle emulation logic
  hw/block: m25p80: Fix dummy byte handling for Spansion flash
  hw/arm/msf2-som: Fix spansion-cr2nv value for S25FL128S
  hw/block: m25p80: Fix dummy byte handling for Macronix flash
  hw/block: m25p80: Fix dummy byte handling for Numonyx/Micron flash
  hw/block: m25p80: Fix dummy byte handling for Winbond flash
  backends/iommufd: Fix dev_id and type order in viommu trace
  hw/acpi/ich9: move initial property values into ich9_reset_properties()
  hw/rtc/mc146818rtc: convert date from object prop to class prop
  hw/arm: Add basic FlexCAN3 support to TYPE_FSL_IMX8MP and imx8mp-evk
  hw/arm/imx8mp-evk: Introduce FslImx8mpEvkState
  hw/arm/imx8mp-evk: Open code DEFINE_MACHINE_AARCH64
  hw/net/can/flexcan: Subclass TYPE_CAN_FLEXCAN
  hw/net/can/flexcan: Wire clock control module via link property
  hw/intc/loongarch_dintc: Fix OOB access in DINT MMIO write handler
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:19:33 +02:00
Stefan Hajnoczi
3be363aa8b Merge tag 's390x-20260707' of https://gitlab.com/cohuck/qemu into staging
s390x updates:
- fix some errors when IPLing from PCI devices
- a number of fixes for guest->host error handling
- add ASTFLE facility 2 support (with headers update)
- regenerate s390-ccw.img

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# gpg: Signature made Tue 07 Jul 2026 14:53:12 CEST
# gpg:                using EDDSA key 69A3B536F5CBFC65208026C1DE88BB5641DE66C1
# gpg:                issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown]
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>" [unknown]
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF
#      Subkey fingerprint: 69A3 B536 F5CB FC65 2080  26C1 DE88 BB56 41DE 66C1

* tag 's390x-20260707' of https://gitlab.com/cohuck/qemu:
  pc-bios/s390-ccw.img: update s390x bios
  s390x/css: limit number of CHPIDs in description
  s390x/ioinst: Require strict length and format for SEI CHSC handler
  s390x/pci: Shrink RPCIT ranges to registered window
  s390x/pci: Tighten region detection for BAR read/write
  s390x/sclp: reject invalid write event data headers
  target/s390x: Fix wrong address handling in address loops
  s390x/kvm: Add ASTFLE facility 2 for nested virtualization
  linux-headers: Update to Linux v7.2-rc1 with KVM_S390_VM_CPU_FEAT_ASTFLEIE2
  s390x: Enable boot menu for virtio pci device
  pc-bios/s390-ccw: write IPLB location for non-net virtio devices
  pc-bios/s390-ccw: Verify virtio support when booting from virtio PCI device on s390x
  pc-bios/s390-ccw: Add per-queue notification offset for multi-queue virtio configurations
  pc-bios/s390-ccw/virtio.c: Fix missing break for PCI notifications
  pc-bios/s390-ccw: Refactor byte swapping

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:18:55 +02:00
Stefan Hajnoczi
bfa6186509 Merge tag 'pull-aspeed-20260707' of https://github.com/legoater/qemu into staging
aspeed queue :

* Fix stale pending interrupts in INTC for level-triggered sources
* Fix intermittent functional test timeouts on boot completion detection
* Fix off-by-one in pca9552 QOM led index validation
* Fix AST2700 FC machine hardware strap settings
* Drop noisy unhandled read logs for AST2700 SCU/SCUIO
* Add SCUIO RNG support for AST2700
* Add unimplemented Privilege Controller and OTP MMIO regions for SSP/TSP

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# gpg: Signature made Tue 07 Jul 2026 14:42:49 CEST
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-aspeed-20260707' of https://github.com/legoater/qemu:
  hw/arm/aspeed_ast27x0: Add unimplemented OTP controller MMIO regions for SSP/TSP
  hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO regions for SSP/TSP
  hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers
  hw/misc/aspeed_scu: Drop noisy unhandled read logs for AST2700 SCU/SCUIO
  hw/arm/aspeed_ast27x0-fc: Fix hardware strap settings
  hw/gpio/pca9552: fix off-by-one in QOM led index validation
  tests/functional/aspeed: unify boot completion detection on 'login:' prompt
  hw/intc/aspeed: Drop stale pending interrupts

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:18:20 +02:00
Stefan Hajnoczi
67943f9371 Merge tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru into staging
Monitor patches for 2026-07-07

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# gpg: Signature made Tue 07 Jul 2026 11:43:48 CEST
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru: (35 commits)
  docs: mark '-mon' as deprecated in favour of -object
  qemu-options: document new monitor-hmp and monitor-qmp objects
  tests: switch from -mon to -object monitor-qmp
  monitor: add support for auto-deleting monitors upon close
  qom: add trace events for user creatable create/delete APIs
  tests/functional: add a stress test for monitor hot unplug
  tests/functional: add e2e test for dynamic QMP monitor hotplug
  tests/qtest: add tests for dynamic monitor add/remove
  monitor: implement support for deleting QMP objects
  monitor: protect qemu_chr_fe_accept_input with monitor lock
  monitor: reject attempts to delete the current monitor
  monitor: convert from oneshot BH to persistent BH
  monitor: implement "user creatable" interface for adding monitors
  monitor: eliminate monitor_is_hmp_non_interactive method
  monitor: drop unused monitor_is_qmp method
  monitor: use dynamic cast in monitor_is_hmp_non_interactive
  monitor: use dynamic cast in QMP commands
  monitor: drop unused monitor_cur_is_qmp
  util: use dynamic cast in error vreport
  monitor: use dynamic cast in monitor_qmp_requests_pop_any_with_lock
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:17:41 +02:00
Stefan Hajnoczi
c5c47902ab Merge tag 'pull-vfio-20260707' of https://github.com/legoater/qemu into staging
vfio queue:

* Fixes ROM read issues in vfio/pci: information leak, error
  propagation, and uninitialized state
* Validates VERSION replies in vfio-user and updates the spec
  for DMA access mode bits
* Merges .dma_map_file() into .dma_map() in the iommufd backend
* Reworks switchover-ack to be re-usable and implements the
  VFIO_PRECOPY_INFO_REINIT feature for additional pre-copy
  iterations before switchover
* Adds ATS support for passthrough devices via iommufd
* Fixes translated_addr for non-identity-mapped RAM sections in
  the VFIO listener
* Reject invalid MSI-X Table and PBA BIR values

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# gpg: Signature made Tue 07 Jul 2026 07:39:27 CEST
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20260707' of https://github.com/legoater/qemu: (27 commits)
  vfio/pci: Reject invalid MSI-X Table and PBA BIR values
  backends/iommufd: Fix dev_id and type order in viommu trace
  vfio/listener: Fix translated_addr for non-identity-mapped RAM sections
  vfio/pci: Propagate errors in vfio_pci_load_rom() using Error API
  vfio/pci: Add ats property
  iommufd: Introduce handler for device ATS support
  migration: Fix "switchover" used as a verb in comments and docs
  migration: Refactor migration_completion_precopy() to return bool
  migration: Enable new switchover-ack
  vfio/migration: Check VFIO_PRECOPY_INFO_REINIT during switchover
  vfio/migration: Implement VFIO_PRECOPY_INFO_REINIT feature
  vfio/migration: Add new switchover-ack mechanism
  vfio/migration: Add Error ** parameter to vfio_migration_init()
  vfio/migration: Extract VFIO_MIG_FLAG_DEV_INIT_DATA_SENT sending to helper
  migration: Fail migration if switchover-ack is requested after switchover decision
  migration: Make switchover-ack re-usable
  migration: Rename switchover-ack code to legacy
  migration: Replace switchover_ack_needed SaveVMHandler
  migration: Log the approver in qemu_loadvm_approve_switchover()
  migration: Run final save_query_pending at switchover
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:16:58 +02:00
Richard Henderson
b79a9b6e5b accel/tcg: Use TLB_FORCE_SLOW not TLB_MMIO for user-only plugins
In 6d03226b42 we set TLB_MMIO to a non-zero value for user-only
so that we could return a non-zero value from probe_* functions
so that we could force callers like Arm SVE vector moves to use
the slow path rather than direct access.  All for the sake of
exposing these accesses to plugins.

Back then, TLB_FORCE_SLOW did not exist, so TLB_MMIO seemed like
a reasonable solution.  However, user-only doesn't really have
MMIO and this has knock-on effects, like forcing Arm SVE first-fault
vector loads to stop.  Better to use TLB_FORCE_SLOW as a more exact
trigger for plugins.

Cc: qemu-stable@nongnu.org
Fixes: 6d03226b42 ("plugins: force slow path when plugins instrument memory ops")
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260702171057.47998-1-richard.henderson@linaro.org>
2026-07-07 09:48:42 -07:00
Bin Meng
27961a043c Revert "aspeed/smc: snoop SPI transfers to fake dummy cycles"
This reverts commit f95c4bffdc.

The m25p80 model now accounts for fast-read dummy bytes in its
command decoder. In ASPEED SMC model user mode, guest software
already sends the complete byte stream, including any dummy
bytes needed by the flash. Hence the model should just forward
exactly the bytes supplied by the guest without the need of
decoding guest-supplied flash op codes to inject extra dummy
transfers.

Signed-off-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20260707083431.219671-10-bin.meng@processmission.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:11:52 +02:00
Bin Meng
7017b47701 hw/ssi: xilinx_spips: Fix dummy phase handling
The ZynqMP generic FIFO encodes dummy phases as a number of
dummy cycles. QEMU's SSI bus transfers whole bytes, so the
controller model must convert the programmed cycle count to the
number of SSI byte transfers needed for the selected SPI, dual SPI
or quad SPI mode.

The legacy Xilinx QSPI snoop paths had the opposite problem after
the m25p80 dummy handling was fixed. They still treated each dummy
byte queued through the FIFO as a request to generate several SSI
transfers based on the current link width. The flash model now
consumes dummy phases as byte counts, so the manual FIFO path should
forward one SSI transfer per dummy byte.

Update the Xilinx QSPI dummy accounting consistently for the generic
FIFO, manual FIFO and LQSPI direct-read paths. Also make the command
table report the dummy byte counts consumed by m25p80 for dual and
quad output reads, and account for the mode byte before LQSPI data
reads begin.

This matches the ZynqMP TRM (ug1085, v2.2 [1]) description of the
generic FIFO dummy cycle entry and keeps the controller side aligned
with the flash model's dummy byte ownership.

The description of the generic command fifo register says:

  When [receive, transmit, data_xfer] = [0,0,1], the [immediate_data]
  field represents the number of dummy cycle sent on the SPI interface.

[1] https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
    table 24‐22, an example of Generic FIFO Contents for Quad I/O Read Command (EBh)

Fixes: ef06ca3946 ("xilinx_spips: Add support for RX discard and RX drain")
Fixes: c95997a39d ("xilinx_spips: Add support for the ZynqMP Generic QSPI")
Signed-off-by: Bin Meng <bin.meng@processmission.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20260707083431.219671-7-bin.meng@processmission.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:11:52 +02:00
Mark Cave-Ayland
29b6fe5aeb hw/acpi/ich9: move initial property values into ich9_reset_properties()
Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260703135512.3213964-7-mark.caveayland@nutanix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:10:24 +02:00
Bernhard Beschow
7a4775d07f hw/arm: Add basic FlexCAN3 support to TYPE_FSL_IMX8MP and imx8mp-evk
Real hardware supports CAN FD which is missing in the emulation and is
considered future work. Still, CAN communication already works under Linux.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Acked-by: Pavel Pisa <pisa@fel.cvut.cz>
Tested-by: Pavel Pisa <pisa@fel.cvut.cz>
Message-ID: <20260702184038.178196-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:10:24 +02:00
Bernhard Beschow
a12368aec4 hw/net/can/flexcan: Subclass TYPE_CAN_FLEXCAN
Subclass TYPE_CAN_FLEXCAN, yielding TYPE_CAN_FLEXCAN2 and
TYPE_CAN_FLEXCAN3.
Since TYPE_CAN_FLEXCAN is now abstract, TYPE_FSL_IMX6 needs to use
TYPE_CAN_FLEXCAN2. TYPE_CAN_FLEXCAN3 will be used in TYPE_FSL_IMX8MP.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Acked-by: Pavel Pisa <pisa@fel.cvut.cz>
Tested-by: Pavel Pisa <pisa@fel.cvut.cz>
Message-ID: <20260702184038.178196-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:10:24 +02:00
Jamin Lin
21eac78874 hw/arm/aspeed_ast27x0: Add unimplemented OTP controller MMIO regions for SSP/TSP
The AST2700 SSP/TSP firmware accesses OTP MMIO regions that
are not yet implemented in QEMU.

This change adds unimplemented MMIO devices for the OTP and maps them to
their corresponding physical addresses in the SSP/TSP address space.
These stub devices allow QEMU to safely handle firmware
accesses and prevent spurious exceptions, while accurately reflecting
the hardware memory map.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Link: https://lore.kernel.org/qemu-devel/20260706052701.1141740-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 14:28:55 +02:00
Jamin Lin
59a3b57bab hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO regions for SSP/TSP
The AST2700 SSP/TSP firmware accesses Privilege Controller MMIO regions that
are not yet implemented in QEMU.

This change adds unimplemented MMIO devices for the Privilege Controller
blocks and maps them to their corresponding physical addresses in the SSP/TSP
address space. These stub devices allow QEMU to safely handle firmware
accesses and prevent spurious exceptions, while accurately reflecting
the hardware memory map.

No functional changes.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Link: https://lore.kernel.org/qemu-devel/20260706052701.1141740-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 14:28:55 +02:00
Daniel P. Berrangé
b465a08b0c monitor: eliminate monitor_is_hmp_non_interactive method
The monitor_is_hmp_non_interactive method is used by
monitor_suspend and monitor_resume, to make them a no-op
if the HMP does not use readline.

There are only a handful of callers of suspend/resume and
they can be made to skip the call when readline is not
present.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-23-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:25 +02:00
Daniel P. Berrangé
28eb8ea2ef monitor: drop unused monitor_cur_is_qmp
The previous patch dropped the only remaining use of
monitor_cur_is_qmp.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-19-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:25 +02:00
Daniel P. Berrangé
d5b007ae8d monitor: use class methods for monitor_qapi_event_emit
This removes the need for using monitor_is_qmp() to check the
subclass type, which is an anti-pattern.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-14-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:24 +02:00
Daniel P. Berrangé
7e3ce81383 monitor: pass chardev ID into monitor constructor instead of object
Current the monitor_new_hmp/monitor_new_qmp constructors accept
a Chardev object pointer. To facilitate the next commit which will
introduce a QOM property for the character device ID, switch to
accepting an chardev ID in the constructor.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-7-berrange@redhat.com>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:23 +02:00
Daniel P. Berrangé
f96eac8a4f monitor: minimal conversion of monitors to QOM
This introduces abstract QOM type "monitor", with concrete subtypes
"monitor-hmp" and "monitor-qmp". This is the bare minimum conversion
of just the type declarations and replacing g_new/g_free with
object_new/object_unref.

Command line option "-monitor" now creates a "monitor-hmp" object
"/objects/compat_monitorNNN" in addition to the character device
"/chardevs/compat_monitorNNN". NNN counts up from zero.

Exception: "-monitor chardev:ID" creates a "monitor-hmp" object
"/objects/ID", and does not create a character device.

"-qmp" and "-qmp-pretty" work the same, except they create a
"monitor-qmp" object.

"-mon" now creates either a "monitor-hmp" or "monitor-qmp" object
"/objects/ID" if the option argument provides an ID, else
"/objects/compat_monitorNNN".

"-gdbstub" and "-serial mon:..." now create a "monitor-hmp" object
"/objects/compat_monitorNNN".

Note that the object's name in "/objects/" matches the QemuOpts ID when
it exists.  The only cases where it doesn't exist are "-mon" without ID,
"-gdbstub" and "-serial mon:".

A future patch will make "monitor-hmp" and "monitor-qmp" work with
"-object" and "object-add".

Note: there is a slight change in the NNN values assigned. The old
code would increment the counter for every monitor added (except for
-mon, -serial mon:..., -gdbstub), regardless of whether it needed a
"compat_monitorNNN" ID assignment. Now it is only incremented when an
automatic ID assigned is needed (but even for -mon, -serial mon:...,
-gdbstub).

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-6-berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Commit message made slightly more precise]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:23 +02:00
Daniel P. Berrangé
fc500ce4d3 monitor: rename monitor_init* to monitor_new*
The current "monitor_init" functions will clash with the methods of the
same name that are required by QOM. To ease the transition to QOM,
rename them out of the way.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dave@treblig.org>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-5-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:23 +02:00
Daniel P. Berrangé
9c3b2c9db5 qom: replace 'can_be_deleted' with 'prepare_delete'
While most objects can perform all their cleanup in the finalizer
method, there can be interactions with other resources / subsystems
/ threads which require that some cleanup be performed on an user
creatable object before unparenting it and entering finalization.

The current 'can_be_deleted' method runs in the deletion path and
is intended to be used to block deletion. While it could be used
to perform cleanup tasks, its name suggests it should be free of
side-effects.

Generalize this by renaming it to 'prepare_delete', explicitly
allowing for cleanup to be provided. Existing users of 'can_be_deleted'
are re-written, which provides them with more detailed/tailored error
messages.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-2-berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:22 +02:00
Nathan Chen
6befa55274 iommufd: Introduce handler for device ATS support
Introduce a support_ats() handler that returns whether ATS is supported
for a device associated with a host IOMMU device, checking if the
IOMMU_HW_CAP_PCI_ATS_NOT_SUPPORTED capability bit is set.

Implement this handler in a new function for iommufd.

Suggested-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Link: https://lore.kernel.org/qemu-devel/20260623204943.989903-2-nathanc@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Avihai Horon
de0a1aed07 migration: Make switchover-ack re-usable
Switchover-ack is a mechanism to synchronize between source and
destination QEMU during migration to prevent the source from switching
over prematurely.

VFIO uses switchover-ack to ensure switchover happens only after
destination side has loaded the precopy initial bytes. This is important
for VFIO, as otherwise downtime could be impacted and be higher.

In its current state, switchover-ack is a one-time mechanism, meaning
that switchover is acked only once and past that another ACK cannot be
requested again. This was sufficient until now, as VFIO precopy initial
bytes was defined to be monotonically decreasing. Thus, when precopy
initial bytes reached zero for all VFIO devices, a single ACK would be
sent and its validity would hold.

However, now the new VFIO_PRECOPY_INFO_REINIT feature allows precopy
initial bytes to be re-initialized during precopy. Specifically, it
means that initial bytes can grow after reaching zero, which would
invalidate a previously sent switchover ACK.

To solve this, make switchover-ack reusable and allow devices to request
switchover ACKs when needed via the save_query_pending SaveVMHandler.

Since now switchover ACK can be requested for a specific device and in
different times, make switchover ACK per-device (instead of a single ACK
for all devices) and let source side do the pending ACKs accounting.

Keep the legacy switchover-ack mechanism for backward compatibility and
turn it on by a compatibility property for older machines. Enable the
property until VFIO implements the new switchover-ack.

Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Link: https://lore.kernel.org/qemu-devel/20260706085211.13905-8-avihaih@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Avihai Horon
d55f1cf24f migration: Rename switchover-ack code to legacy
A new switchover-ack mechanism will be added in the following patches.
However, the old mechanism must still be kept for backward
compatibility.

Rename existing code that will be used only for old switchover-ack
mechanism as legacy. This will help to distinguish legacy code from new
code and make it more readable and easier for removal later when no
longer needed.

No functional change intended.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Link: https://lore.kernel.org/qemu-devel/20260706085211.13905-7-avihaih@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Avihai Horon
f267196712 migration: Replace switchover_ack_needed SaveVMHandler
A new switchover-ack mechanism that will replace the existing one will
be added in the following patches. The new mechanism will not use
switchover_ack_needed SaveVMHandler, however, the old mechanism must
still be kept for backward compatibility.

To keep things clear and decrease API surface of old code, replace
switchover_ack_needed SaveVMHandler with a regular function
migration_request_switchover_ack().

No functional changes intended.

Acked-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Link: https://lore.kernel.org/qemu-devel/20260706085211.13905-6-avihaih@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Avihai Horon
3c11e33016 migration: Run final save_query_pending at switchover
Before switchover, the source needs one last exact pending query so
modules can flush dirty state. This is currently done ad hoc in modules
handlers. For example, RAM syncs its dirty bitmap in its save_complete
handler.

This should be a general concept relevant for any module, so extract it
to migration core instead by running a final save_query_pending before
switchover.

The final query requires special handling by modules (e.g., it's called
with BQL locked, during VM stop), so extend save_query_pending
SaveVMHandlers callback and qemu_savevm_query_pending() with a "final"
flag so migration modules can tell the last pending query during
switchover from periodic iteration queries.

Call final pending query also in COLO checkpoint, which needs to flush
dirty state before the checkpoint's live state is saved. Unlike a
regular switchover, COLO reaches completion repeatedly for every
checkpoint, so this must be done on each one.

Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260706085211.13905-4-avihaih@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Cédric Le Goater
877da38313 vfio/iommufd: Merge .dma_map_file() into .dma_map()
Simplify the VFIOIOMMUClass interface by removing the dma_map_file
handler. Move the logic to decide between the standard virtual and
file-backed mapping into the IOMMUFD backend, utilizing the
MemoryRegion already passed to the dma_map handler.

This removes redundant dispatch logic from the generic container layer
and let backends to manage their own mapping strategies. This is
similar to the vfio-user implementation.

Reviewed-by: Alex Williamson <alex@shazbot.org>
Link: https://lore.kernel.org/qemu-devel/20260608055758.359002-1-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Stefan Hajnoczi
916ab315cc Merge tag 'pull-nvme-20260707' of https://gitlab.com/birkelund/qemu into staging
nvme queue

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* tag 'pull-nvme-20260707' of https://gitlab.com/birkelund/qemu:
  hw/nvme: add namespace hotplug support
  tests/qtest/nvme-test: add migration test with full CQ
  tests/functional/x86_64: add migration test for NVMe device
  hw/nvme: add basic live migration support
  hw/nvme: unmap req->sg earlier in nvme_enqueue_req_completion
  hw/nvme: set CQE.sq_id earlier in nvme_process_sq
  hw/nvme: split nvme_init_sq/nvme_init_cq into helpers
  hw/nvme: add migration blockers for non-supported cases
  tests/functional/migration: add VM launch/configure hooks
  hw/nvme: ensure sgl forward progress
  hw/nvme: fix FDP set FDP events

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 07:09:38 +02:00
Alexander Mikhalitsyn
5320d335fb hw/nvme: add migration blockers for non-supported cases
Let's block migration for cases we don't support:
- SR-IOV
- CMB
- PMR
- SPDM

No functional changes here, because NVMe migration is
not supported at all as of this commit.

Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Alexander Mikhalitsyn <aleksandr.mikhalitsyn@futurfusion.io>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2026-07-07 00:39:42 +02:00
Stefan Hajnoczi
94826ec137 Merge tag 'accel-20260706' of https://github.com/philmd/qemu into staging
Accelerators patches queue

- Various cleanups around debugging APIs
- Correctly check singlestep flag enabled in CPUState
- Fix possible memory corruption with MSHV (CID 1660876)

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* tag 'accel-20260706' of https://github.com/philmd/qemu: (32 commits)
  cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping()
  cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags
  cpu: Introduce cpu_single_stepping() helper
  cpu: Better name cpu_single_step() trace event
  accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers
  target/ppc: Ensure TCG is used in ppc_update_daw()
  target/arm: Inline check_watchpoints() in arm_debug_check_watchpoint()
  accel: Use GdbBreakpointType enum
  gdbstub: Introduce GdbBreakpointType enumerator
  gdbstub: Reduce @type variable scope
  gdbstub/user: Directly call gdb_breakpoint_remove_all() in user mode
  accel: Remove unnecessary 'inline' qualifier in remove_all_breakpoints
  cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h'
  cpu: Move cpu_breakpoint_test out of line
  accel: Remove AccelOpsClass::supports_guest_debug
  accel: Hold @can_reverse information in AccelGdbConfig
  gdbstub: Make default replay_mode value explicit in stubs
  accel: Have each implementation return their AccelGdbConfig
  gdbstub: Move supported_sstep_flags in AccelGdbConfig structure
  gdbstub: Reduce gdb_supports_guest_debug() scope
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:38:14 +02:00
Stefan Hajnoczi
d0edff8ee1 Merge tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
 * hw/net/fsl_etsec: validate FCB offsets in process_tx_fcb()
 * hw/arm/smmuv3-accel: Fix veventq read returning true on EAGAIN/EINTR
 * target/arm: Only evaluate SCR_EL3.PIEN if ARM_FEATURE_EL3 is present
 * hw/arm: use cortex-a9 mpcore base for CBAR on npcm7xx machines
 * docs/specs/fw_cfg: Document all architecture register layouts
 * hw/nvram/fw_cfg: Simplify functions so board models don't have
   the opportunity to create non-standard fw_cfg register layouts
 * hw/misc: use tracepoints rather than DPRINTF in imx ccm models
 * hw/arm: add support for shim loading
 * docs/system/arm: Document Zynq Buildroot boot
 * target/arm: Report correct syndrome to AArch32 EL2 for trapped
   Neon/VFP insns
 * target/arm: implement WFET to not be a NOP
 * target/arm: Emulate FEAT_SME_MOP4
 * target/arm: Emulate FEAT_FPRCVT
 * target/arm: Emulate FEAT_SSVE_FEXPA

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# gpg: Signature made Mon 06 Jul 2026 12:36:41 CEST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu: (49 commits)
  target/arm: Define fields for NSACR
  target/arm: Report correct syndrome to AArch32 EL2 for trapped Neon/VFP insns
  target/arm: Separate syndrome functions for A32 and A64
  target/arm: Separate out Neon from VFP access checks
  target/arm: Enable FEAT_SME_MOP4 for -cpu max
  target/arm: Implement USMOP4[AS]
  target/arm: Implement UMOP4[AS] (4-way)
  target/arm: Implement UMOP4[AS] (2-way)
  target/arm: Implement SUMOP4[AS]
  target/arm: Implement SMOP4[AS] (4-way)
  target/arm: Implement SMOP4[AS] (2-way)
  target/arm: Implement FMOP4A (widening, 2-way, FP8 to FP16)
  target/arm: Implement FMOP4 (widening, 4-way fp8 to fp32)
  target/arm: Implement FMOP4 (widening, 2-way fp16 to fp32)
  target/arm: Implement BFMOP4 (widening)
  target/arm: Implement BFMOP4 (non-widening)
  target/arm: Implement FMOP4 (non-widening) for float64
  target/arm: Implement FMOP4 (non-widening) for float16
  target/arm: Implement FMOP4 (non-widening) for float32
  docs/system/arm: Document Zynq Buildroot boot
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:37:28 +02:00
Stefan Hajnoczi
48560f0d96 Merge tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu into staging
PPC PR for 11.1 Soft-freeze

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# gpg: Signature made Mon 06 Jul 2026 10:20:12 CEST
# gpg:                using RSA key 6B810CD6D2BE10F3883D21424544E994F9D68FBB
# gpg: Good signature from "Harsh Prateek Bora <harsh.prateek.bora@gmail.com>" [full]
# gpg:                 aka "Harsh Prateek Bora <harshpb@linux.ibm.com>" [full]
# Primary key fingerprint: 6B81 0CD6 D2BE 10F3 883D  2142 4544 E994 F9D6 8FBB

* tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu:
  MAINTAINERS: Add self as maintainer for PowerNV
  ppc/pnv: Remove Power8E and Power8NVL CPUs
  ppc/pnv: Remove Power8E and Power8NVL pnv chips
  ppc/pnv: Replace Power8E with Power11 for 'none' machine test
  tests/functional: Use default powernv machine instead of power10
  tests/qtest: Add Power11 chip & machine to qtests
  tests/qtest/pnv_spi: Test Power11 PNV_SPI
  tests/functional: Add remote interrupts test for PowerNV

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:36:52 +02:00
Stefan Hajnoczi
9a84bbf230 Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci, vhost, virtio, iommu: features, fixes, cleanups

A new sp-mem device
New tests for vtd
New seg-max-adjust flag for vhost-user-blk
Watchdog support for arm/virt

Fixes, cleanups all over the place.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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# gpg: Signature made Sun 05 Jul 2026 15:19:16 CEST
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (44 commits)
  virtio-net: validate RSS indirections_len in post_load
  vhost-user-blk: add seg-max-adjust flag
  vhost-user-scmi: free vhost virtqueue array on cleanup
  hw/virtio-crypto: enforce max akcipher key length
  vhost-user: Guarantee that memory regions do not overlap
  tests: acpi: arm/virt: update expected GTDT blob
  tests: acpi: arm/virt: add GTDT watchdog table test case
  tests: acpi: arm/virt: whitelist GTDT table
  tests: acpi: arm/virt: update expected WDAT blob
  tests: acpi: arm/virt: add WDAT table test case
  tests: acpi: arm/virt: whitelist new WDAT table
  arm: virt: add support for WDAT based watchdog
  acpi: introduce WDAT table for GWDT
  arm: sbsa-gwdt: add 'wdat' option
  arm: virt: create sbsa-gwdt watchdog
  arm: sbsa_gwdt: rename device type to sbsa-gwdt
  arm: add tracing events to sbsa_gwdt
  arm: sbsa_gwdt: fixup default "clock-frequency"
  vdpa: fix use-after-free of vqs in vhost_vdpa_device_unrealize
  vhost-user-base: clean up vhost_dev on realize failure
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:33:19 +02:00
Philippe Mathieu-Daudé
c0df53752c cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping()
Only the SSTEP_ENABLE bitmask means single-step is enabled.

Fixes: 60897d369f ("Debugger single step without interrupts")
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-33-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
7e28b7c897 cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags
CPUState::singlestep_enabled contains multiple flags since
commit 60897d369f ("Debugger single step without interrupts").
Use an unsigned type and rename the field to avoid mistakes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-32-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
0a8bc0f251 cpu: Introduce cpu_single_stepping() helper
Access CPUState::@singlestep_enabled field with a helper.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-31-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
93e7ca71d7 accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers
Commit d5ee641cfc ("target/ppc: Implement watchpoint debug facility
for v2.07S") also implemented TCGCPUOps::debug_check_watchpoint for
PPC: make the comment generic.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-29-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
0c4f68b2e3 accel: Use GdbBreakpointType enum
Include '_gdbstub_' in the AccelOpsClass handlers to emphasize
we are handling gdbstub-related requests.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-26-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
af97fe2eaf gdbstub: Introduce GdbBreakpointType enumerator
Introduce the GdbBreakpointType enumerator to better follow
code related to GDB protocol handling.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-25-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
fe90b5f15b cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h'
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-20-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Richard Henderson
032731dbaf cpu: Move cpu_breakpoint_test out of line
Move the function to cpu-common.c, with the other
breakpoint functions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Message-ID: <20260705215729.62196-19-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
0533f08413 accel: Remove AccelOpsClass::supports_guest_debug
Now accelerators hold the 'guest debug supported' information
in their state, accessible by the common code. No need to call
a per-accelerator handler, simply check for the SSTEP_ENABLE
in AccelGdbConfig::sstep_flags.

Remove all AccelOpsClass::supports_guest_debug implementations,
inline gdb_supports_guest_debug() and remove the now unnecessary
KVMState::have_guest_debug field.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-18-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
2aaa8ee7de accel: Hold @can_reverse information in AccelGdbConfig
Hold @can_reverse in AccelGdbConfig, set it when initializing
AccelState in AccelClass::init_machine handlers (only TCG sets
it). Remove gdb_can_reverse() as now unused.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-ID: <20260705215729.62196-17-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
8c60f7f38e accel: Have each implementation return their AccelGdbConfig
Hold the per-accelerator AccelGdbConfig in AccelState, set its
single @sstep_flags field in AccelClass::init_machine handlers.

Remove the AccelClass::gdbstub_supported_sstep_flags() getter
and inline the single accel_supported_gdbstub_sstep_flags() call
in gdb_init_gdbserver_state().

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-15-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
e9c5654035 gdbstub: Move supported_sstep_flags in AccelGdbConfig structure
supported_sstep_flags are per-accelerators. Move them
to a new AccelGdbConfig structure, still in GDBState.

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-14-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
f2468e2f49 accel/kvm: Hold have_guest_debug in KVMState
Prefer to store per-accelerator variables in the per-accelerator
state, rather than as static variables. This is a good practice
to allow concurrent accelerators in the future.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-12-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
67ae20cc4a accel/whpx: Implement missing AccelClass::gdbstub_supported_sstep_flags
Correct gdbstub support requires some gdbstub_supported_sstep_flags.
Apparently missed in commit d7482ffe97 ("whpx: Added support for
breakpoints and stepping"), even with the recent 19b48084f7 ("whpx:
i386: re-enable guest debug support") fixes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-9-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
abdd572a43 accel/mshv: Replace @dirty field by generic CPUState::vcpu_dirty field
No need for accel-specific @dirty field when we have
a generic one in CPUState. (Other accelerators already
did that in commits 6f13a0ada01..36ab216b81d).

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Tested-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-6-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
cadee08114 accel/tcg: Restrict tlb_protect/unprotect_code() to TCG
Both tlb_protect() and tlb_unprotect_code() are only used
within accel/tcg/. Avoid exposing them to the whole code base,
declare them in a new "system-page-protection.h" local header
(maintaining the previous LGPL-2.1-or-later license).

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Message-ID: <20260705215729.62196-4-philmd@oss.qualcomm.com>
2026-07-06 15:41:34 +02:00
Philippe Mathieu-Daudé
65339110b7 cpu: Constify CPUState::cc (cached CPUClass pointer)
Various CPUState can share the same CPUClass parent,
and must not update its fields. Protect the CPUClass
by marking the CPUState pointer const.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Chao Liu <chao.liu.zevorn@gmail.com>
Message-ID: <20260705215729.62196-2-philmd@oss.qualcomm.com>
2026-07-06 14:57:00 +02:00