12605 Commits

Author SHA1 Message Date
Stefan Hajnoczi
8dcbb339f5 Merge tag 'pull-tcg-20260707' of https://gitlab.com/rth7680/qemu into staging
tcg/loongarch64: Fix cmp_vec with TCG_COND_NE
tcg/x86_64: declare MO_ATOM_WITHIN16 host atomicity support
accel/tcg: Make PageFlagsNodes' start and last immutable
accel/tcg: Use TLB_FORCE_SLOW not TLB_MMIO for user-only plugins

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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20260707' of https://gitlab.com/rth7680/qemu:
  tcg/loongarch64: Fix cmp_vec with TCG_COND_NE
  tcg/x86_64: declare MO_ATOM_WITHIN16 host atomicity support
  Revert "tests/tcg: skip the vma-pthread test on CI"
  tests/tcg/multiarch: Improve mutator randomness
  accel/tcg: Make PageFlagsNodes' start and last immutable
  accel/tcg: Use TLB_FORCE_SLOW not TLB_MMIO for user-only plugins

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-08 16:00:20 +02:00
Stefan Hajnoczi
2c8cf1f16d Merge tag 'mips-20260707' of https://github.com/philmd/qemu into staging
MIPS and SuperH patches queue

- MIPS Octeon COP2 crypto opcodes
- Fix for SH4 FIPR/FTRV vector math opcodes

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# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'mips-20260707' of https://github.com/philmd/qemu: (23 commits)
  qemu-options: Do not list -enable-kvm on MIPS binaries
  target/sh4: fixup tcg for sh4 fipr/ftrv instructions
  tests/tcg/mips: cover Octeon QMAC instructions
  target/mips: add Octeon CvmCount RDHWR support
  target/mips: decode Octeon CHORD and LLM COP2 selectors
  target/mips: decode Octeon block-cipher COP2 selectors
  target/mips: decode Octeon ZUC and SNOW3G COP2 selectors
  target/mips: decode Octeon HSH and SHA3 COP2 selectors
  target/mips: decode Octeon CRC and GFM COP2 selectors
  target/mips: decode Octeon COP2 register selectors
  target/mips: add Octeon CHORD and LLM COP2 helpers
  target/mips: add Octeon HSH COP2 helpers
  target/mips: add Octeon Camellia COP2 helpers
  target/mips: add Octeon 3DES and KASUMI COP2 helpers
  target/mips: add Octeon SMS4 COP2 helpers
  target/mips: add Octeon AES COP2 helpers
  target/mips: add Octeon SNOW3G COP2 helpers
  target/mips: add Octeon ZUC COP2 helpers
  target/mips: add Octeon SHA3 COP2 helpers
  target/mips: add Octeon GFM COP2 helpers
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-08 15:59:51 +02:00
James Hilliard
b6726871b9 tests/tcg/mips: cover Octeon QMAC instructions
Add smoke coverage for Octeon QMAC and QMACS fixed-point accumulator
instruction paths.

The coverage exercises normal accumulation, saturating accumulation, and
the sticky saturation flag.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-21-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 20:14:51 +02:00
James Hilliard
c2fd17ec64 target/mips: add Octeon CvmCount RDHWR support
Octeon exposes CvmCount through RDHWR register 31. Add the Octeon-only
decode path, enable the corresponding HWREna bit for linux-user, and use
an unsigned mask when checking HWREna so bit 31 is handled safely.

For user-mode emulation, return host ticks as a monotonic counter source
suitable for existing Octeon userspace code. In system mode, fall back to
the existing CP0 Count value.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-20-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 20:14:46 +02:00
James Hilliard
9679d839f8 target/mips: decode Octeon CRC and GFM COP2 selectors
Add explicit decodetree entries and translator bindings for the Octeon
CRC and GFM COP2 operation selectors. Unlike simple register moves,
these selectors update CRC or Galois-field state and therefore remain
per-operation helper calls.

Keep CRC/GFM decode next to the helpers that implement these side
effects while avoiding a monolithic selector-dispatch helper.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-15-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 20:14:46 +02:00
James Hilliard
e32e36298e target/mips: decode Octeon COP2 register selectors
Add explicit decodetree entries and translator bindings for Octeon
DMFC2/DMTC2 selectors that are simple COP2 register transfers.

Emit direct TCG loads and stores for register moves. Use signed 32-bit
loads for 32-bit DMFC2 readback and mask narrow writable fields such as
AESKEYLEN and CRCLEN on DMTC2.

Keep operation selectors with side effects in later functional decode
patches.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-14-daef7a0d8b04@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 20:14:46 +02:00
Ilya Leoshkevich
db6b71f1ad Revert "tests/tcg: skip the vma-pthread test on CI"
Now that the page_check_range() race condition is fixed, let
vma-pthread run on CI again.

This reverts commit 5842de5157.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260706165445.57418-4-iii@linux.ibm.com>
2026-07-07 11:01:32 -07:00
Ilya Leoshkevich
39678e16e8 tests/tcg/multiarch: Improve mutator randomness
Currently mutators perform the same actions, because the RNG seed is
derived from the current time in seconds. Mix in thread ID.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260706165445.57418-3-iii@linux.ibm.com>
2026-07-07 11:01:27 -07:00
Stefan Hajnoczi
c3a63b7c06 Merge tag 'hw-misc-20260707' of https://github.com/philmd/qemu into staging
Misc HW patches

- MAINTAINERS update
- Fix in few trace event formats
- A pair of improvements in util/
- FlexCAN3 to imx8mp-evk board
- Various fixes in hw/
  (EDU, ATI VGA, IDE AHCI, PCA9552, i8257 DMA,
   e1000e/igb, MPT SAS, Hyper-V, QXL, M25P80)

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# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20260707' of https://github.com/philmd/qemu: (36 commits)
  MAINTAINERS: update Chao Liu's email address
  Revert "aspeed/smc: snoop SPI transfers to fake dummy cycles"
  Revert "aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command"
  hw/ssi: aspeed_smc: Fix direct-read dummy bytes
  hw/ssi: xilinx_spips: Fix dummy phase handling
  hw/ssi: npcm7xx_fiu: Correct the dummy cycle emulation logic
  hw/block: m25p80: Fix dummy byte handling for Spansion flash
  hw/arm/msf2-som: Fix spansion-cr2nv value for S25FL128S
  hw/block: m25p80: Fix dummy byte handling for Macronix flash
  hw/block: m25p80: Fix dummy byte handling for Numonyx/Micron flash
  hw/block: m25p80: Fix dummy byte handling for Winbond flash
  backends/iommufd: Fix dev_id and type order in viommu trace
  hw/acpi/ich9: move initial property values into ich9_reset_properties()
  hw/rtc/mc146818rtc: convert date from object prop to class prop
  hw/arm: Add basic FlexCAN3 support to TYPE_FSL_IMX8MP and imx8mp-evk
  hw/arm/imx8mp-evk: Introduce FslImx8mpEvkState
  hw/arm/imx8mp-evk: Open code DEFINE_MACHINE_AARCH64
  hw/net/can/flexcan: Subclass TYPE_CAN_FLEXCAN
  hw/net/can/flexcan: Wire clock control module via link property
  hw/intc/loongarch_dintc: Fix OOB access in DINT MMIO write handler
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:19:33 +02:00
Stefan Hajnoczi
67943f9371 Merge tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru into staging
Monitor patches for 2026-07-07

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# gpg: Signature made Tue 07 Jul 2026 11:43:48 CEST
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru: (35 commits)
  docs: mark '-mon' as deprecated in favour of -object
  qemu-options: document new monitor-hmp and monitor-qmp objects
  tests: switch from -mon to -object monitor-qmp
  monitor: add support for auto-deleting monitors upon close
  qom: add trace events for user creatable create/delete APIs
  tests/functional: add a stress test for monitor hot unplug
  tests/functional: add e2e test for dynamic QMP monitor hotplug
  tests/qtest: add tests for dynamic monitor add/remove
  monitor: implement support for deleting QMP objects
  monitor: protect qemu_chr_fe_accept_input with monitor lock
  monitor: reject attempts to delete the current monitor
  monitor: convert from oneshot BH to persistent BH
  monitor: implement "user creatable" interface for adding monitors
  monitor: eliminate monitor_is_hmp_non_interactive method
  monitor: drop unused monitor_is_qmp method
  monitor: use dynamic cast in monitor_is_hmp_non_interactive
  monitor: use dynamic cast in QMP commands
  monitor: drop unused monitor_cur_is_qmp
  util: use dynamic cast in error vreport
  monitor: use dynamic cast in monitor_qmp_requests_pop_any_with_lock
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:17:41 +02:00
Stefan Hajnoczi
fd5feef61a Merge tag 'pull-request-2026-07-07' of https://gitlab.com/huth/qemu into staging
* Add test for hotplugging a virtio-scsi disk
* Improve boot completion detection in aspeed tests
* Use QMP to query available machines in functional tests

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# gpg: Signature made Tue 07 Jul 2026 08:07:22 CEST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "th.huth@posteo.eu"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg: issuer "th.huth@posteo.eu" does not match any User ID
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2026-07-07' of https://gitlab.com/huth/qemu:
  tests/functional: use QMP to query available machines
  tests/functional/aspeed: unify boot completion detection on 'login:' prompt
  tests/functional: Add hotplug_scsi test to hotplug virtio-scsi disk

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:11:54 +02:00
Denis V. Lunev
cb7bc10385 tests/qtest/ahci: test ATAPI read completing after engine restart
Add a regression test for the crash that occurs when a buffered ATAPI
read completes after the command engine has been restarted. Issue an
ATAPI READ_10 against a blkdebug-backed CD, suspend the backend read so
it stays in flight, stop and restart the port's command engine (which
re-maps the command list and clears cur_cmd), then release the read.

The PIO and DMA reply paths fault in different AHCI helpers
(ahci_pio_transfer() vs ahci_dma_rw_buf()), so cover both. The DMA
variant is the reliable guard: on engine restart check_cmd() can re-arm
cur_cmd before the old read completes, so the PIO variant does not fault
in every build.

The test only asserts that qemu survives a subsequent register access;
if the blkdebug breakpoint ever failed to park the read it would pass
without exercising the bug, as with the existing break/resume tests.

Signed-off-by: Denis V. Lunev <den@openvz.org>
Message-ID: <20260619112158.304782-3-den@openvz.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
2026-07-07 17:10:20 +02:00
Daniel P. Berrangé
05e4982dfc tests: switch from -mon to -object monitor-qmp
Use the new preferred low level option for configuring the
QMP service in libqtest and the python Machine class used
by tests. This will avoid triggering deprecation warnings
after the subsequent commit.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-34-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:27 +02:00
Daniel P. Berrangé
6c479e70e2 monitor: add support for auto-deleting monitors upon close
The default monitor is usually a long lived object that will exist for
the entire lifetime of the VM. A monitor can only service a single
client at a time though, and so it might be desirable to hotplug
additional monitors at runtime for specific tasks. If doing that,
however, there is a need to remove the monitor when it is no longer
needed.

A use case for hotplugging a monitor can involve a user wishing to
spawn an ad hoc script that uses a temporary monitor. The script can
ask the management application to hotplug a monitor and pass back a
pre-opened FD using SCM_RIGHTS. In this case the lifetime of the
script is not tied to the management application and thus it is
desirable to have automatic cleanup when the script exits.

Allowing a client to run "object-del" against its own monitor adds
complex edge cases, as it would be desirable to send the QMP response
despite the monitor sending it being deleted. Doing "object-del" alone
will also result in orphaning a character device backend instance, as
there is no opportunity to run the companion "chardev-del" command.

A simpler way to ensure cleanup is to add the concept of auto-deleting
monitor objects. Specifically when the "CHR_EVENT_CLOSED" event is
emitted, the equivalent of "object-del" + "chardev-del" can be run
internally. Since the transient client has already droppped its
monitor connection, there is no synchronization to be concerned about
with sending QMP replies. There is still some internal synchronization
needed, however, between the character device event callback and the
bottom-half that runs the delete. There is a chance that an incoming
client connection may arise before the bottom-half runs, which has
to be checked. Once the monitor object is deleted, the event callback
is unregistered from the character device, eliminating any further
races before the character device is fully deleted.

This is implemented via a new "close-action=none|delete" property on
the 'monitor-qmp' object. This concept could be extended with further
actions in future, for example:

 * close-action=shutdown - graceful guest shutdown
 * close-action=terminate - immediate guest poweroff
 * close-action=stop - pause guest CPUs while the monitor is not
                       connected to any client

This is left as an exercise for future interested contributors.

Tested-by: Peter Krempa <pkrempa@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-33-berrange@redhat.com>
[Commit message typos fixed]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:27 +02:00
Daniel P. Berrangé
8b142ecb34 tests/functional: add a stress test for monitor hot unplug
When unplugging a monitor there is a careful synchronization dance
between the monitor handling the "object-del" command and the
command processing for the monitor being deleted.

The stress test runs a busy loop of 'query-qmp-schema' on a second
monitor, while the primary monitor requests its deletion.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-31-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:26 +02:00
Christian Brauner
f9827a9b9a tests/functional: add e2e test for dynamic QMP monitor hotplug
Add functional tests that exercise dynamic monitor hotplug with real
socket connections:

- Hotplug cycle: chardev-add a unix socket, object-add, connect to the
  socket, receive the QMP greeting, negotiate capabilities, send
  query-version, disconnect, remove the monitor and chardev, then repeat
  the entire cycle a second time to verify cleanup and reuse.

- Self-removal: a dynamically-added monitor sends object-del
  targeting itself, verifying that the request is rejected

- Large response: send query-qmp-schema on a dynamic monitor to
  exercise the output buffer flush path with a large response payload.

- Events after negotiation: trigger STOP/RESUME events via the main
  monitor and verify they are delivered on the dynamic monitor.

This complements the qtest unit tests by verifying that a real QMP
client can connect to a dynamically-added monitor and exchange messages.

Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>
[DB: modified to use object-add/object-del; adjust self-removal test
 to validate rejection of request]
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-30-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:26 +02:00
Christian Brauner
c4d8038813 tests/qtest: add tests for dynamic monitor add/remove
Test the object-add/object-del QMP commands with the monitor-qmp
object type.

- Basic lifecycle: chardev-add -> object-add -> object-del -> chardev-remove
- Error: object-add with nonexistent chardev
- Error: second monitor on same chardev (chardev already in use)
- Removal of CLI-created QMP monitor succeeds
- Error: object-remove on HMP monitor
- Re-add after remove: same id and chardev reusable after removal

Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>
[DB: modified to use object-add/object-del, removing redundant
     scenarios already handled by object-add/del code]
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-29-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:26 +02:00
Daniel P. Berrangé
28eb8ea2ef monitor: drop unused monitor_cur_is_qmp
The previous patch dropped the only remaining use of
monitor_cur_is_qmp.

Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Peter Krempa <pkrempa@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-19-berrange@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:25 +02:00
Daniel P. Berrangé
9c3b2c9db5 qom: replace 'can_be_deleted' with 'prepare_delete'
While most objects can perform all their cleanup in the finalizer
method, there can be interactions with other resources / subsystems
/ threads which require that some cleanup be performed on an user
creatable object before unparenting it and entering finalization.

The current 'can_be_deleted' method runs in the deletion path and
is intended to be used to block deletion. While it could be used
to perform cleanup tasks, its name suggests it should be free of
side-effects.

Generalize this by renaming it to 'prepare_delete', explicitly
allowing for cleanup to be provided. Existing users of 'can_be_deleted'
are re-written, which provides them with more detailed/tailored error
messages.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-2-berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:22 +02:00
Stefan Hajnoczi
916ab315cc Merge tag 'pull-nvme-20260707' of https://gitlab.com/birkelund/qemu into staging
nvme queue

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* tag 'pull-nvme-20260707' of https://gitlab.com/birkelund/qemu:
  hw/nvme: add namespace hotplug support
  tests/qtest/nvme-test: add migration test with full CQ
  tests/functional/x86_64: add migration test for NVMe device
  hw/nvme: add basic live migration support
  hw/nvme: unmap req->sg earlier in nvme_enqueue_req_completion
  hw/nvme: set CQE.sq_id earlier in nvme_process_sq
  hw/nvme: split nvme_init_sq/nvme_init_cq into helpers
  hw/nvme: add migration blockers for non-supported cases
  tests/functional/migration: add VM launch/configure hooks
  hw/nvme: ensure sgl forward progress
  hw/nvme: fix FDP set FDP events

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 07:09:38 +02:00
Alexander Mikhalitsyn
e5830e0ec1 tests/qtest/nvme-test: add migration test with full CQ
As suggested by Stefan [1], let's add a migration test to cover
rare scenario when CQ is full of non-processed CQEs and migration
happens.

To run this test:
$ meson test -C build 'qtest-x86_64/qos-test'

Link: https://lore.kernel.org/qemu-devel/20260408183529.GB319710@fedora/ [1]
Suggested-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Alexander Mikhalitsyn <aleksandr.mikhalitsyn@futurfusion.io>
Acked-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2026-07-07 00:39:42 +02:00
Alexander Mikhalitsyn
d77f38a2b5 tests/functional/x86_64: add migration test for NVMe device
Introduce a very simple test to ensure that NVMe device
migration works fine.

Test plan is simple:
1. prepare VM with NVMe device
2. run workload that produces relatively heavy IO on the device
3. migrate VM
4. ensure that workload is alive and finishes without errors

Test can be run as simple as:
$ meson test 'func-x86_64-nvme_migration' --setup thorough -C build

In the future we can extend this approach, and introduce some
fio-based tests. And probably, it makes sense to make this test
to apply not only to NVMe device, but also virtio-{blk,scsi},
ide, sata and other migratable devices.

Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Alexander Mikhalitsyn <aleksandr.mikhalitsyn@futurfusion.io>
Acked-by: Klaus Jensen <k.jensen@samsung.com>
Acked-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2026-07-07 00:39:42 +02:00
Alexander Mikhalitsyn
cb8f285ce9 tests/functional/migration: add VM launch/configure hooks
Introduce configure_machine, launch_source_vm and assert_dest_vm
methods to allow child classes to override some pieces of
source/dest VMs creation, start and check logic.

Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Alexander Mikhalitsyn <aleksandr.mikhalitsyn@futurfusion.io>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2026-07-07 00:39:42 +02:00
Stefan Hajnoczi
d0edff8ee1 Merge tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
 * hw/net/fsl_etsec: validate FCB offsets in process_tx_fcb()
 * hw/arm/smmuv3-accel: Fix veventq read returning true on EAGAIN/EINTR
 * target/arm: Only evaluate SCR_EL3.PIEN if ARM_FEATURE_EL3 is present
 * hw/arm: use cortex-a9 mpcore base for CBAR on npcm7xx machines
 * docs/specs/fw_cfg: Document all architecture register layouts
 * hw/nvram/fw_cfg: Simplify functions so board models don't have
   the opportunity to create non-standard fw_cfg register layouts
 * hw/misc: use tracepoints rather than DPRINTF in imx ccm models
 * hw/arm: add support for shim loading
 * docs/system/arm: Document Zynq Buildroot boot
 * target/arm: Report correct syndrome to AArch32 EL2 for trapped
   Neon/VFP insns
 * target/arm: implement WFET to not be a NOP
 * target/arm: Emulate FEAT_SME_MOP4
 * target/arm: Emulate FEAT_FPRCVT
 * target/arm: Emulate FEAT_SSVE_FEXPA

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# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
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* tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu: (49 commits)
  target/arm: Define fields for NSACR
  target/arm: Report correct syndrome to AArch32 EL2 for trapped Neon/VFP insns
  target/arm: Separate syndrome functions for A32 and A64
  target/arm: Separate out Neon from VFP access checks
  target/arm: Enable FEAT_SME_MOP4 for -cpu max
  target/arm: Implement USMOP4[AS]
  target/arm: Implement UMOP4[AS] (4-way)
  target/arm: Implement UMOP4[AS] (2-way)
  target/arm: Implement SUMOP4[AS]
  target/arm: Implement SMOP4[AS] (4-way)
  target/arm: Implement SMOP4[AS] (2-way)
  target/arm: Implement FMOP4A (widening, 2-way, FP8 to FP16)
  target/arm: Implement FMOP4 (widening, 4-way fp8 to fp32)
  target/arm: Implement FMOP4 (widening, 2-way fp16 to fp32)
  target/arm: Implement BFMOP4 (widening)
  target/arm: Implement BFMOP4 (non-widening)
  target/arm: Implement FMOP4 (non-widening) for float64
  target/arm: Implement FMOP4 (non-widening) for float16
  target/arm: Implement FMOP4 (non-widening) for float32
  docs/system/arm: Document Zynq Buildroot boot
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:37:28 +02:00
Stefan Hajnoczi
48560f0d96 Merge tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu into staging
PPC PR for 11.1 Soft-freeze

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# gpg: Signature made Mon 06 Jul 2026 10:20:12 CEST
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# gpg:                 aka "Harsh Prateek Bora <harshpb@linux.ibm.com>" [full]
# Primary key fingerprint: 6B81 0CD6 D2BE 10F3 883D  2142 4544 E994 F9D6 8FBB

* tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu:
  MAINTAINERS: Add self as maintainer for PowerNV
  ppc/pnv: Remove Power8E and Power8NVL CPUs
  ppc/pnv: Remove Power8E and Power8NVL pnv chips
  ppc/pnv: Replace Power8E with Power11 for 'none' machine test
  tests/functional: Use default powernv machine instead of power10
  tests/qtest: Add Power11 chip & machine to qtests
  tests/qtest/pnv_spi: Test Power11 PNV_SPI
  tests/functional: Add remote interrupts test for PowerNV

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:36:52 +02:00
Stefan Hajnoczi
9a84bbf230 Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci, vhost, virtio, iommu: features, fixes, cleanups

A new sp-mem device
New tests for vtd
New seg-max-adjust flag for vhost-user-blk
Watchdog support for arm/virt

Fixes, cleanups all over the place.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
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* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (44 commits)
  virtio-net: validate RSS indirections_len in post_load
  vhost-user-blk: add seg-max-adjust flag
  vhost-user-scmi: free vhost virtqueue array on cleanup
  hw/virtio-crypto: enforce max akcipher key length
  vhost-user: Guarantee that memory regions do not overlap
  tests: acpi: arm/virt: update expected GTDT blob
  tests: acpi: arm/virt: add GTDT watchdog table test case
  tests: acpi: arm/virt: whitelist GTDT table
  tests: acpi: arm/virt: update expected WDAT blob
  tests: acpi: arm/virt: add WDAT table test case
  tests: acpi: arm/virt: whitelist new WDAT table
  arm: virt: add support for WDAT based watchdog
  acpi: introduce WDAT table for GWDT
  arm: sbsa-gwdt: add 'wdat' option
  arm: virt: create sbsa-gwdt watchdog
  arm: sbsa_gwdt: rename device type to sbsa-gwdt
  arm: add tracing events to sbsa_gwdt
  arm: sbsa_gwdt: fixup default "clock-frequency"
  vdpa: fix use-after-free of vqs in vhost_vdpa_device_unrealize
  vhost-user-base: clean up vhost_dev on realize failure
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-06 18:33:19 +02:00
Alex Bennée
786b689e7c tests/functional: update anacapa-bmc image
The initial version had the wrong DTB which caused issues with image
corruption [1]. Update to the latest version.

[1] https://github.com/legoater/qemu-aspeed-boot/pull/7

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20260624103049.884930-3-alex.bennee@linaro.org
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-07-06 11:32:01 +01:00
Jim MacArthur
97af096c69 tests/tcg/arm: Tests for new FPRCVT instructions
We autodetect the presence of FPRCVT in the test cross compiler,
which is a recent feature in GCC and not supported by many distros
yet. If this is in place, we compile the existing fcvt.c test with
an extra compiler flag which uses the new SIMD instructions; the
output from the test is unchanged.

The existing [US]CVTF instructions do not have a test, so no new
tests are added for the SIMD versions. They have been tested manually
to check the new SIMD versions produce the same numerical results as
the existing versions.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Jim MacArthur <jim.macarthur@linaro.org>
Message-id: 20260630-jmac-fprcvt-v3-6-f4840d5e0a7f@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-07-06 11:32:01 +01:00
Aditya Gupta
cfa89bd78a ppc/pnv: Remove Power8E and Power8NVL pnv chips
Power8E and Power8NVL were deprecated since QEMU 10.1, with
commit 264a604e71 ("target/ppc: Deprecate Power8E and Power8NVL")

Accordingly, remove usage of 8E and 8NVL chips from powernv, as it's old
and unmaintained now.

Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-7-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:47 +05:30
Aditya Gupta
f535033d78 ppc/pnv: Replace Power8E with Power11 for 'none' machine test
Power8E and Power8NVL were deprecated since QEMU 10.1, with
commit 264a604e71 ("target/ppc: Deprecate Power8E and Power8NVL")

As Power8E chip is removed in future commits, remove the use of Power8E
chip for use with the none machine test, and replace with Power11 for
ppc64 test coverage for the test

Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Reviewed-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-6-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:46 +05:30
Aditya Gupta
3c4a2f2ab7 tests/functional: Use default powernv machine instead of power10
The default powernv machine has been recently changed to powernv11,
though fadump functional test used powernv10

Change it to use default 'powernv' machine for the tests instead of
being fixed to powernv10

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-5-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:46 +05:30
Aditya Gupta
0e82cffd5e tests/qtest: Add Power11 chip & machine to qtests
Previously the machines/chips tested by qtest was till Power10, update
the tests to also test PowerNV11 and Power11 PNV Chip

Since if-else-if ladder was common pattern to get machine type,
implement pnv_get_machine_type so new processor cases can be implemented
in one location in pnv_get_machine_type

While at it, also add g_autofree to allocation by g_strdup_printf in
modified tests

Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-4-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:46 +05:30
Aditya Gupta
d81885d242 tests/qtest/pnv_spi: Test Power11 PNV_SPI
Currently pnv-spi-seeprom-test was hardcoded to test the 4th chip in
pnv_chips (power10 as of now).

This requires ensuring to update the index when removing/adding entries
in pnv_chips, such as when Power8E or Power11 gets removed/added in
future commits.

Iterate over all the chips instead, similar to other tests in
pnv-xscom-test.c and pnv-host-i2c-test.c, but skip older chips, since
TYPE_PNV_SPI only exists from Power10 onwards, hence skip older machines

Tests all the pnv_chips similar to other qtests

Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-3-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:46 +05:30
Aditya Gupta
63f5ba8092 tests/functional: Add remote interrupts test for PowerNV
In the past there have been hard to recreate issues where XIVE changes
cause qemu crashes due to multi-socket interrupts such as in [1].

Add a functional test explicitly to test whether remote interrupts work.

The test can also work as additional boot test for multi-socket boot,
initrd boot test, as well as a check for e1000e to be working in powernv,
though that's not a target goal, and are additional benefits.

>From docs/system/devices/net.rst:

  In order to check that the user mode network is working, you can ping
  the address 10.0.2.2 and verify that you got an address in the range
  10.0.2.x from the QEMU virtual DHCP server.

Hence use 10.0.2.2 with ping.

[1]: https://lore.kernel.org/qemu-devel/baf6c854-832b-4a2e-922f-d34e6dadf821@redhat.com/

Tested-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Reviewed-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-2-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
2026-07-06 12:06:38 +05:30
Ganesh Harshan
0e7aa78b0b tests/functional: use QMP to query available machines
Replace parsing of "qemu -M help" in set_machine() with
QMP "query-machines".

The previous approach relied on parsing human-readable CLI
output and substring matching, which is fragile and prone to
incorrect matches. It is also sensitive to output format changes.

Use QMP instead to retrieve structured machine information,
ensuring accurate matching and better maintainability.

Cache the result at the class level to avoid repeated QEMU
startup overhead.

Signed-off-by: Ganesh Harshan <ganeshredcobra@gmail.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260625165310.54113-1-ganeshredcobra@gmail.com>
[thuth: Drop problematic self.vm.set_machine() statement]
Signed-off-by: Thomas Huth <th.huth@posteo.eu>
2026-07-05 21:29:32 +02:00
Igor Mammedov
7205b8ffb6 tests: acpi: arm/virt: update expected GTDT blob
Expected diff from base GTDT is an addition of watchdog
timer block:

   [000h 0000 004h]                   Signature : "GTDT"    [Generic Timer Description Table]
  -[004h 0004 004h]                Table Length : 00000068
  +[004h 0004 004h]                Table Length : 00000084
   [008h 0008 001h]                    Revision : 03
  -[009h 0009 001h]                    Checksum : 93
  +[009h 0009 001h]                    Checksum : 39
   [00Ah 0010 006h]                      Oem ID : "BOCHS "
   [010h 0016 008h]                Oem Table ID : "BXPC    "
   [018h 0024 004h]                Oem Revision : 00000001
  @@ -48,17 +48,30 @@
                                      Always On : 0
   [050h 0080 008h]  Counter Read Block Address : FFFFFFFFFFFFFFFF

  -[058h 0088 004h]        Platform Timer Count : 00000000
  -[05Ch 0092 004h]       Platform Timer Offset : 00000000
  +[058h 0088 004h]        Platform Timer Count : 00000001
  +[05Ch 0092 004h]       Platform Timer Offset : 00000068
   [060h 0096 004h]      Virtual EL2 Timer GSIV : 00000000
   [064h 0100 004h]     Virtual EL2 Timer Flags : 00000000

  -Raw Table Data: Length 104 (0x68)
  +[068h 0104 001h]               Subtable Type : 01 [Generic Watchdog Timer]
  +[069h 0105 002h]                      Length : 001C
  +[06Bh 0107 001h]                    Reserved : 00
  +[06Ch 0108 008h]       Refresh Frame Address : 000000000C000000
  +[074h 0116 008h]       Control Frame Address : 000000000C001000
  +[07Ch 0124 004h]             Timer Interrupt : 00000090
  +[080h 0128 004h] Timer Flags (decoded below) : 00000000
  +                                Trigger Mode : 0
  +                                    Polarity : 0
  +                                    Security : 0
  +
  +Raw Table Data: Length 132 (0x84)

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-14-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Igor Mammedov
c2a283fe99 tests: acpi: arm/virt: add GTDT watchdog table test case
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-13-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Igor Mammedov
01ba94bb27 tests: acpi: arm/virt: whitelist GTDT table
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-12-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Igor Mammedov
e84210642c tests: acpi: arm/virt: update expected WDAT blob
replace blank table with a new one:

  [000h 0000 004h]                   Signature : "WDAT"    [Watchdog Action Table]
  [004h 0004 004h]                Table Length : 00000104
  [008h 0008 001h]                    Revision : 01
  [009h 0009 001h]                    Checksum : 3B
  [00Ah 0010 006h]                      Oem ID : "BOCHS "
  [010h 0016 008h]                Oem Table ID : "BXPC    "
  [018h 0024 004h]                Oem Revision : 00000001
  [01Ch 0028 004h]             Asl Compiler ID : "BXPC"
  [020h 0032 004h]       Asl Compiler Revision : 00000001

  [024h 0036 004h]               Header Length : 00000020
  [028h 0040 002h]                 PCI Segment : 00FF
  [02Ah 0042 001h]                     PCI Bus : FF
  [02Bh 0043 001h]                  PCI Device : FF
  [02Ch 0044 001h]                PCI Function : FF
  [02Dh 0045 003h]                    Reserved : 000000
  [030h 0048 004h]                Timer Period : 00000001
  [034h 0052 004h]                   Max Count : 000927C0
  [038h 0056 004h]                   Min Count : 00001388
  [03Ch 0060 001h]       Flags (decoded below) : 81
                                       Enabled : 1
                           Stopped When Asleep : 1
  [03Dh 0061 003h]                    Reserved : 000000
  [040h 0064 004h]        Watchdog Entry Count : 00000008

  [044h 0068 001h]             Watchdog Action : 08
  [045h 0069 001h]                 Instruction : 00
  [046h 0070 002h]                    Reserved : 0000

  [048h 0072 00Ch]             Register Region : [Generic Address Structure]
  [048h 0072 001h]                    Space ID : 00 [SystemMemory]
  [049h 0073 001h]                   Bit Width : 20
  [04Ah 0074 001h]                  Bit Offset : 00
  [04Bh 0075 001h]        Encoded Access Width : 03 [DWord Access:32]
  [04Ch 0076 008h]                     Address : 000000000C001000

  [054h 0084 004h]                       Value : 00000001
  [058h 0088 004h]               Register Mask : 00000001

  [05Ch 0092 001h]             Watchdog Action : 01
  [05Dh 0093 001h]                 Instruction : 02
  [05Eh 0094 002h]                    Reserved : 0000

  [060h 0096 00Ch]             Register Region : [Generic Address Structure]
  [060h 0096 001h]                    Space ID : 00 [SystemMemory]
  [061h 0097 001h]                   Bit Width : 20
  [062h 0098 001h]                  Bit Offset : 00
  [063h 0099 001h]        Encoded Access Width : 03 [DWord Access:32]
  [064h 0100 008h]                     Address : 000000000C000000

  [06Ch 0108 004h]                       Value : 00000001
  [070h 0112 004h]               Register Mask : 00000007

  [074h 0116 001h]             Watchdog Action : 06
  [075h 0117 001h]                 Instruction : 03
  [076h 0118 002h]                    Reserved : 0000

  [078h 0120 00Ch]             Register Region : [Generic Address Structure]
  [078h 0120 001h]                    Space ID : 00 [SystemMemory]
  [079h 0121 001h]                   Bit Width : 20
  [07Ah 0122 001h]                  Bit Offset : 00
  [07Bh 0123 001h]        Encoded Access Width : 03 [DWord Access:32]
  [07Ch 0124 008h]                     Address : 000000000C001008

  [084h 0132 004h]                       Value : 00000000
  [088h 0136 004h]               Register Mask : FFFFFFFF

  [08Ch 0140 001h]             Watchdog Action : 09
  [08Dh 0141 001h]                 Instruction : 82
  [08Eh 0142 002h]                    Reserved : 0000

  [090h 0144 00Ch]             Register Region : [Generic Address Structure]
  [090h 0144 001h]                    Space ID : 00 [SystemMemory]
  [091h 0145 001h]                   Bit Width : 20
  [092h 0146 001h]                  Bit Offset : 00
  [093h 0147 001h]        Encoded Access Width : 03 [DWord Access:32]
  [094h 0148 008h]                     Address : 000000000C001000

  [09Ch 0156 004h]                       Value : 00000001
  [0A0h 0160 004h]               Register Mask : 00000001

  [0A4h 0164 001h]             Watchdog Action : 0A
  [0A5h 0165 001h]                 Instruction : 00
  [0A6h 0166 002h]                    Reserved : 0000

  [0A8h 0168 00Ch]             Register Region : [Generic Address Structure]
  [0A8h 0168 001h]                    Space ID : 00 [SystemMemory]
  [0A9h 0169 001h]                   Bit Width : 20
  [0AAh 0170 001h]                  Bit Offset : 00
  [0ABh 0171 001h]        Encoded Access Width : 03 [DWord Access:32]
  [0ACh 0172 008h]                     Address : 000000000C001000

  [0B4h 0180 004h]                       Value : 00000000
  [0B8h 0184 004h]               Register Mask : 00000001

  [0BCh 0188 001h]             Watchdog Action : 0B
  [0BDh 0189 001h]                 Instruction : 82
  [0BEh 0190 002h]                    Reserved : 0000

  [0C0h 0192 00Ch]             Register Region : [Generic Address Structure]
  [0C0h 0192 001h]                    Space ID : 00 [SystemMemory]
  [0C1h 0193 001h]                   Bit Width : 20
  [0C2h 0194 001h]                  Bit Offset : 00
  [0C3h 0195 001h]        Encoded Access Width : 03 [DWord Access:32]
  [0C4h 0196 008h]                     Address : 000000000C001000

  [0CCh 0204 004h]                       Value : 00000000
  [0D0h 0208 004h]               Register Mask : 00000001

  [0D4h 0212 001h]             Watchdog Action : 20
  [0D5h 0213 001h]                 Instruction : 00
  [0D6h 0214 002h]                    Reserved : 0000

  [0D8h 0216 00Ch]             Register Region : [Generic Address Structure]
  [0D8h 0216 001h]                    Space ID : 00 [SystemMemory]
  [0D9h 0217 001h]                   Bit Width : 20
  [0DAh 0218 001h]                  Bit Offset : 00
  [0DBh 0219 001h]        Encoded Access Width : 03 [DWord Access:32]
  [0DCh 0220 008h]                     Address : 000000000C001000

  [0E4h 0228 004h]                       Value : 00000004
  [0E8h 0232 004h]               Register Mask : 00000004

  [0ECh 0236 001h]             Watchdog Action : 21
  [0EDh 0237 001h]                 Instruction : 82
  [0EEh 0238 002h]                    Reserved : 0000

  [0F0h 0240 00Ch]             Register Region : [Generic Address Structure]
  [0F0h 0240 001h]                    Space ID : 00 [SystemMemory]
  [0F1h 0241 001h]                   Bit Width : 20
  [0F2h 0242 001h]                  Bit Offset : 00
  [0F3h 0243 001h]        Encoded Access Width : 03 [DWord Access:32]
  [0F4h 0244 008h]                     Address : 000000000C000000

  [0FCh 0252 004h]                       Value : 00000004
  [100h 0256 004h]               Register Mask : 00000004

Raw Table Data: Length 260 (0x104)

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-11-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Igor Mammedov
a961808635 tests: acpi: arm/virt: add WDAT table test case
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-10-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Igor Mammedov
e9b2acec1d tests: acpi: arm/virt: whitelist new WDAT table
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260702145856.1539572-9-imammedo@redhat.com>
2026-07-05 09:06:13 -04:00
Junjie Cao
a3fbd2b524 tests/qtest: add IOTLB invalidation test for Intel IOMMU
Nothing in tree exercises IOTLB invalidation for any emulated vIOMMU:
the existing iommu-testdev tests only check one-shot translation, so a
regression that failed to flush a stale IOTLB entry would go unnoticed.

Add a test that drives the queued-invalidation path end to end
(vtd_process_inv_desc -> vtd_process_iotlb_desc ->
vtd_iotlb_{global,domain,page}_invalidate).  For each
{legacy, scalable-slt, scalable-flt} x {global, domain, page}
combination it:

  1. maps IOVA -> PA_A and DMAs, populating the IOTLB;
  2. rewrites the leaf PTE to PA_B *without* invalidating and DMAs
     again, asserting the stale entry is still served (MISMATCH);
  3. submits the IOTLB invalidation plus a wait descriptor, then DMAs
     and asserts the fresh page walk now reaches PA_B.

Step 2 makes the flush observable: it fails loudly if the IOTLB
is not actually caching the first translation.

For scalable first-level (flt), QEMU keeps first- and second-level
mappings in a single IOTLB that the legacy VTD_INV_DESC_IOTLB descriptor
flushes for every level, so the test uses that descriptor across all
modes.  PASID-selective invalidation (VTD_INV_DESC_PIOTLB, vtd_piotlb_*)
is a separate path and is left for a follow-up.

It also adds three page-selective cases that cache a second page and check
its fate after invalidating the first: for second-level (legacy, scalable-slt)
the second page survives, while for first-level (scalable-flt) QEMU flushes all
first-stage entries of the domain, so it does not.  This distinguishes a
page-selective flush from a domain-wide or global one.

Signed-off-by: Junjie Cao <junjie.cao@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260703072200.463082-4-junjie.cao@intel.com>
2026-07-04 05:03:47 -04:00
Junjie Cao
3c774326fe tests/qtest/libqos: add Intel IOMMU invalidation helpers
Add the building blocks a queued-invalidation test needs on top of the
existing translation helpers:

  - qvtd_leaf_pte_addr() / qvtd_make_leaf_pte() let a test locate and
    rewrite the leaf PTE built by qvtd_setup_translation_tables() without
    re-deriving the page-table index or leaf attributes by hand.  The
    attributes reuse qvtd_get_fl_pte_attrs()/qvtd_get_pte_attrs() so the
    first- and second-level leaf formats stay defined in one place.

  - qvtd_submit_iotlb_global_inv() / _domain_inv() / _page_inv() write an
    IOTLB Invalidation Descriptor (global / domain-selective /
    page-selective) into the Invalidation Queue and advance IQT_REG.

  - qvtd_submit_inv_wait_and_poll() submits an Invalidation Wait
    Descriptor with Status Write and polls the status word with a bounded
    retry loop, asserting on timeout.

No caller yet; used by the IOTLB invalidation test that follows.

Signed-off-by: Junjie Cao <junjie.cao@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260703072200.463082-3-junjie.cao@intel.com>
2026-07-04 05:03:47 -04:00
Junjie Cao
302fec996c tests/qtest/libqos: share Intel IOMMU test setup helpers
iommu-intel-test.c keeps the iommu-testdev PCI setup (save_fn(),
setup_qtest_pci_device()) and the VT-d command-line / capability
helpers (qvtd_iommu_args(), qvtd_check_caps()) as file-local statics.
A second Intel IOMMU test would have to copy them, which defeats the
purpose of the shared qos-intel-iommu module.

Move them into qos-intel-iommu so sibling tests can reuse them:
save_fn() becomes qvtd_save_pci_dev() and setup_qtest_pci_device()
becomes qvtd_setup_qtest_pci_device(); qvtd_iommu_args() and
qvtd_check_caps() keep their names.

No functional change: iommu-intel-test now calls the public
qvtd_setup_qtest_pci_device() instead of its file-local copy.

Signed-off-by: Junjie Cao <junjie.cao@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260703072200.463082-2-junjie.cao@intel.com>
2026-07-04 05:03:47 -04:00
fanhuang
c31b39063f tests/qtest: cover sp-mem SOFT_RESERVED e820 entry
Boot one sp-mem device and assert the guest's e820 table gains exactly
one E820_SOFT_RESERVED range whose length matches the device's backend
size.

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260623075051.3797975-11-FangSheng.Huang@amd.com>
2026-07-03 21:21:07 -04:00
fanhuang
0819ca9dbd tests/qtest: add e820 fw_cfg test
Add a qtest that reads the "etc/e820" fw_cfg table and checks its
structural invariants: the file is a whole number of e820 entries and
every entry has a non-zero length. The baseline q35 case asserts the
guest sees RAM and, with no sp-mem device, no SOFT_RESERVED range.

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260623075051.3797975-10-FangSheng.Huang@amd.com>
2026-07-03 21:21:07 -04:00
fanhuang
f46bd7b21e tests/acpi: generate expected blobs for sp-mem SRAT test
Populate the expected ACPI blobs for the sp-mem test and clear the
allowed-diff list.

SRAT memory-affinity entries for the device_memory window (q35,
-m 128M,maxmem=1G, sp0 on node 1 and sp1 on node 2, each 128M):

  Proximity Domain : 1  Base : 0x100000000  Length : 0x08000000  (Enabled)
  Proximity Domain : 2  Base : 0x108000000  Length : 0x08000000  (Enabled)
  Proximity Domain : 2  Base : 0x110000000  Length : 0x128000000 (Hot Pluggable)

Each sp-mem device gets an ENABLED entry at its own proximity domain;
the remaining device_memory window is covered by a HOTPLUGGABLE
placeholder at the highest proximity domain.

(DSDT.spmem differs from the base only by the memory-hotplug AML
enabled by -m,maxmem.)

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260623075051.3797975-9-FangSheng.Huang@amd.com>
2026-07-03 21:21:07 -04:00
fanhuang
ff1d11b7bf tests/acpi: add bios-tables-test case for sp-mem
Add a q35 bios-tables-test case that boots two sp-mem devices on
distinct NUMA nodes within the device_memory window, exercising the
per-kind SRAT partition (per-device ENABLED entries plus HOTPLUGGABLE
placeholders for the remaining sub-ranges).

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260623075051.3797975-8-FangSheng.Huang@amd.com>
2026-07-03 21:21:07 -04:00
fanhuang
54f0db2f59 tests/acpi: add empty expected blobs for sp-mem SRAT test
Add empty SRAT.spmem and DSDT.spmem stubs and list them in
bios-tables-test-allowed-diff.h.

Signed-off-by: FangSheng Huang <FangSheng.Huang@amd.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20260623075051.3797975-7-FangSheng.Huang@amd.com>
2026-07-03 21:21:07 -04:00
Cédric Le Goater
d1edce955d tests/functional/aspeed: unify boot completion detection on 'login:' prompt
The boot completion check in AspeedTest waits for the systemd
"Hostname set to" message, which occasionally causes intermittent test
timeouts, e.g. on ast2500 SoC machines. The root cause seems to be
console output interleaving of both systemd and the getty login
process. This results in the expected pattern string being broken up.

Unify and simplify all boot completion checks by looking for the
generic 'login:' substring in AspeedTest.wait_for_boot_complete().
With the override gone, remove the redundant FacebookAspeedTest class
and update the Anacapa, Bletchley, and Catalina tests to inherit
directly from AspeedTest. Also drop the now-dead image_hostname
parameter from do_test_arm_aspeed_openbmc().

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3117
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20260617042718.2883655-1-clg@redhat.com>
Signed-off-by: Thomas Huth <th.huth@posteo.eu>
2026-07-03 15:34:40 +02:00